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87 lines
3.8 KiB
Plaintext
87 lines
3.8 KiB
Plaintext
/**
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@page RTC_Tamper RTC example
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@verbatim
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******************************************************************************
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* @file Examples_LL/RTC/RTC_Tamper/readme.txt
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* @author MCD Application Team
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* @brief Description of the RTC example.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@endverbatim
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@Note If the user code size exceeds the DTCM-RAM size or starts from internal cacheable memories (SRAM1 and SRAM2),that is shared between several processors,
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then it is highly recommended to enable the CPU cache and maintain its coherence at application level.
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The address and the size of cacheable buffers (shared between CPU and other masters) must be properly updated to be aligned to cache line size (32 bytes).
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@Note It is recommended to enable the cache and maintain its coherence, but depending on the use case
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It is also possible to configure the MPU as "Write through", to guarantee the write access coherence.
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In that case, the MPU must be configured as Cacheable/Bufferable/Not Shareable.
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Even though the user must manage the cache coherence for read accesses.
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Please refer to the AN4838 “Managing memory protection unit (MPU) in STM32 MCUs”
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Please refer to the AN4839 “Level 1 cache on STM32F7 Series”
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@par Example Description
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Configuration of the Tamper using the RTC LL API. The peripheral initialization
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uses LL unitary service functions for optimization purposes (performance and size).
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In this example, after start-up, SYSCLK is configured to the max frequency using the PLL with
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HSE as clock source.
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The RTC peripheral configuration is ensured by the Configure_RTC() function
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(configure of the needed RTC resources according to the used hardware CLOCK,
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PWR, RTC clock source and BackUp). You may update this function to change RTC configuration.
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The associated firmware performs the following:
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1. It configures the Tamper pin to be falling edge, and enables the Tamper
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interrupt.
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2. It writes the data to all RTC Backup data registers, then check whether the
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data were correctly written. If yes, LED1 toggles with a fast period,
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otherwise LED1 toggles with a period of 1s.
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3. Applying a low level on the USER_BUTTON_PIN (PC.13) by pressing User push-button,
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the RTC backup data registers are reset and the Tamper interrupt is generated.
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The corresponding ISR then checks whether the RTC Backup data registers are cleared.
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If yes LED1 turns on, otherwise LED1 toggles with a period of 1s.
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@par Keywords
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System, RTC, Tamper, Reset, LSE, LSI
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@par Directory contents
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- RTC/RTC_Tamper/Inc/stm32f7xx_it.h Interrupt handlers header file
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- RTC/RTC_Tamper/Inc/main.h Header for main.c module
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- RTC/RTC_Tamper/Inc/stm32_assert.h Template file to include assert_failed function
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- RTC/RTC_Tamper/Src/stm32f7xx_it.c Interrupt handlers
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- RTC/RTC_Tamper/Src/main.c Main program
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- RTC/RTC_Tamper/Src/system_stm32f7xx.c STM32F7xx system source file
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@par Hardware and Software environment
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- This example runs on STM32F767xx devices.
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- This example has been tested with NUCLEO-F767ZI board and can be
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easily tailored to any other supported device and development board.
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@par How to use it ?
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In order to make the program work, you must do the following :
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- Open your preferred toolchain
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- Rebuild all files and load your image into target memory
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- Run the example
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*/
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