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122 lines
5.7 KiB
Plaintext
122 lines
5.7 KiB
Plaintext
/**
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/**
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@page GPIO_IOToggle GPIO IO Toggle example
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@verbatim
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******************************************************************************
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* @file GPIO/GPIO_IOToggle/readme.txt
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* @author MCD Application Team
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* @brief Description of the GPIO IO Toggle example.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2018 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@endverbatim
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@par Example Description
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How to configure and use GPIOs through the HAL API.
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PA7 IO (configured in output pushpull mode) toggles in a forever loop.
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On STM32F7308-DISCO board this IO is connected to LED5.
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This example provide different configuration for linker files which allows different eXecution in Place (XiP) schemas
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Supported configuration by STM32F7308-Discovery:
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- XiP From QSPI, DATA on Internal SRAM
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- XiP From QSPI, DATA on External PSRAM
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Make sure that chosen config matches ExtMem_Boot config in memory.h file.
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@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
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based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
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a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
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than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
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To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
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@note The example needs to ensure that the SysTick time base is always set to 1 millisecond
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to have correct HAL operation.
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@note The STM32F7xx devices can reach a maximum clock frequency of 216MHz but as this application uses SDRAM,
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the system clock is limited to 200MHz. Indeed proper functioning of the SDRAM is only guaranteed
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at a maximum system clock frequency of 200MHz.
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@par Keywords
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System, GPIO, Output, Alternate function, Push-pull, Toggle
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@Note<74>If the user code size exceeds the DTCM-RAM size or starts from internal cacheable memories (SRAM1 and SRAM2),that is shared between several processors,
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then it is highly recommended to enable the CPU cache and maintain its coherence at application level.
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In case of constraints it is possible to configure the MPU as "Write through/not shareable" to guarantee the cache coherence at write access but the user
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has to ensure the cache maintenance at read access though.
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The address and the size of cacheable buffers (shared between CPU and other masters) must be properly updated to be aligned to cache line size (32 bytes).
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@Note It is recommended to enable the cache and maintain its coherence, but depending on the use case
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It is also possible to configure the MPU as "Write through", to guarantee the write access coherence.
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In that case, the MPU must be configured as Cacheable/Bufferable/Not Shareable.
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Even though the user must manage the cache coherence for read accesses.
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Please refer to the AN4838 (Managing memory protection unit (MPU) in STM32 MCUs)
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Please refer to the AN4839 (Level 1 cache on STM32F7 Series)
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@par Directory contents
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- "GPIO_IOToggle/Inc": contains the GPIO_IOToggle firmware header files
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- GPIO/GPIO_IOToggle/Inc/main.h Main configuration file
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- GPIO/GPIO_IOToggle/Inc/stm32f7xx_it.h Interrupt handlers header file
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- GPIO/GPIO_IOToggle/Inc/stm32f7xx_hal_conf.h HAL Configuration file
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- "GPIO_IOToggle/Src": contains the GPIO_IOToggle firmware source files
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- GPIO/GPIO_IOToggle/Src/main.c Main program
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- GPIO/GPIO_IOToggle/Src/stm32f7xx_hal_msp.c Microcontroller specific packages initialization file.
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- GPIO/GPIO_IOToggle/Src/stm32f7xx_it.c Interrupt handlers
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- GPIO/GPIO_IOToggle/Src/system_stm32f7xx.c STM32F7xx system clock configuration file
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@par Hardware and Software environment
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- This example runs on STM32F730xx devices.
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- This example has been tested with STMicroelectronics STM32F7308-DISCO
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boards and can be easily tailored to any other supported device
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and development board.
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@par How to use it ?
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In order to make the program work, you must do the following:
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1. Select required configuration in memory.h in Templates/ExtMem_Boot/Inc.
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2. Program the internal Flash with the ExtMem_Boot (see below).
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3. Use corresponding project configuration for this example (GPIO_IOToggle).
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4. Program the external QSPI memory with this example (see below).
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5. Start debugging this example or reset for free running.
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In order to load the ExtMem_Boot code :
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- Open your preferred toolchain :
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- Open the Project
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- Rebuild all files
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- Load project image
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In order to load the this example to the external memory:
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- Open your preferred toolchain
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- Open the Project
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- Use project matching ExtMem_Boot selected configuration
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- Rebuild all files:
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- Run & debug the program:
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- For an XiP configuration (eXecute in Place from QSPI):
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- Using EWARM or MDK-ARM : Load project image from the IDE: Project->Debug
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- Using SW4STM32 :
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- Open the STM32CubeProgrammer tool
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- Select the QSPI external flash loader "MX25L512G_STM32F7308-DISCO"
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- From Erasing & Programming menu, browse and open the output binary file relative to this example
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- Load the file into the external QSPI flash using "Start Programming" at the address APPLICATION_ADDRESS (0x90000000)
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*/
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