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/**
@page FreeRTOS_SemaphoreFromISR FreeRTOS semaphore from ISR example
@verbatim
******************************************************************************
* @file FreeRTOS/FreeRTOS_SemaphoreFromISR/readme.txt
* @author MCD Application Team
* @brief Description of the FreeRTOS semaphore from ISR example.
******************************************************************************
*
* Copyright (c) 2016 STMicroelectronics International N.V. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted, provided that the following conditions are met:
*
* 1. Redistribution of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
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* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of other
* contributors to this software may be used to endorse or promote products
* derived from this software without specific written permission.
* 4. This software, including modifications and/or derivative works of this
* software, must execute solely and exclusively on microcontroller or
* microprocessor devices manufactured by or for STMicroelectronics.
* 5. Redistribution and use of this software other than as permitted under
* this license is void and will automatically terminate your rights under
* this license.
*
* THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
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******************************************************************************
@endverbatim
@par Description
How to use semaphore from ISR with CMSIS RTOS API.
This example creates a thread that toggle a LED through semaphore given from ISR.
Each time the user pushes the Tamper push-button of the STM32F769I-EVAL board the semaphore
is given to the SemaphoreTest thread to toggle the LED1.
@note Care must be taken when using HAL_Delay(), this function provides accurate
delay (in milliseconds) based on variable incremented in HAL time base ISR. This
implies that if HAL_Delay() is called from a peripheral ISR process, then
the HAL time base interrupt must have higher priority (numerically lower)
than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority() function.
@note The application need to ensure that the HAL time base is always set to 1 millisecond
to have correct HAL operation.
@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
on STM32Cube with RTOS".
@par Keywords
RTOS, FreeRTOS, Thread, Semaphore, Priorities, ISR, Interrupt
@Note<74>If the user code size exceeds the DTCM-RAM size or starts from internal cacheable memories (SRAM1 and SRAM2),that is shared between several processors,
<20><><A0><A0><A0>then it is highly recommended to enable the CPU cache and maintain its coherence at application level.
<0A><><A0><A0><A0><A0>The address and the size of cacheable buffers (shared between CPU and other masters) must be properly updated to be aligned to cache line size (32 bytes).
@Note It is recommended to enable the cache and maintain its coherence, but depending on the use case
<0A><><A0><A0><A0> It is also possible to configure the MPU as "Write through", to guarantee the write access coherence.
<0A><><A0><A0><A0><A0>In that case, the MPU must be configured as Cacheable/Bufferable/Not Shareable.
<0A><><A0><A0><A0><A0>Even though the user must manage the cache coherence for read accesses.
<0A><><A0><A0><A0><A0>Please refer to the AN4838 <20>Managing memory protection unit (MPU) in STM32 MCUs<55>
<0A><><A0><A0><A0><A0>Please refer to the AN4839 <20>Level 1 cache on STM32F7 Series<65>
@par Directory contents
- FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/main.c Main program
- FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32f7xx_it.c Interrupt handlers
- FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/system_stm32f7xx.c STM32F7xx system clock configuration file
- FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/main.h Main program header file
- FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32f7xx_hal_conf.h HAL Library Configuration file
- FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32f7xx_it.h Interrupt handlers header file
- FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/FreeRTOSConfig.h FreeRTOS Configuration file
@par Hardware and Software environment
- This example runs on STM32F767xx/STM32F769xx/STM32F777xx/STM32F779xx devices.
- This example has been tested with STM32F769I-EVAL board and can be
easily tailored to any other supported device and development board.
@par How to use it ?
In order to make the program work, you must do the following:
- Open your preferred toolchain
- Rebuild all files and load your image into target memory
- Run the example
* <h3><center>© COPYRIGHT STMicroelectronics</center></h3>
*/