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107 lines
4.5 KiB
Plaintext
107 lines
4.5 KiB
Plaintext
/**
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@page TIM_PWMOutput TIM example
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@verbatim
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******************************************************************************
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* @file Examples_LL/TIM/TIM_PWMOutput/readme.txt
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* @author MCD Application Team
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* @brief Description of the TIM_PWMOutput example.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@endverbatim
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@par Example Description
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Use of a timer peripheral to generate a
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PWM output signal and update the PWM duty cycle. This example is based on the
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STM32F7xx TIM LL API. The peripheral initialization uses
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LL unitary service functions for optimization purposes (performance and size).
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In this example TIM3 input clock (TIM3CLK) frequency is set to APB1 clock (PCLK1),
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since APB1 pre-scaler is equal to 2 and it is twice PCLK1.
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TIM3CLK = 2*PCLK1
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PCLK1 = HCLK/2
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=> TIM3CLK = (2/2)*HCLK = SystemCoreClock (216 Mhz)
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To set the TIM3 counter clock frequency to 10 KHz, the pre-scaler (PSC) is
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calculated as follows:
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PSC = (TIM3CLK / TIM3 counter clock) - 1
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PSC = (SystemCoreClock /10 KHz) - 1
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SystemCoreClock is set to 216 MHz for STM32F7xx Devices.
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Auto-reload (ARR) is calculated to get a time base period of 10 ms,
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meaning a time base frequency of 100 Hz.
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ARR = (TIM3 counter clock / time base frequency) - 1
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ARR = (TIM3 counter clock / 100) - 1
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Initially, the capture/compare register (CCR3) of the output channel is set to
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half the auto-reload value meaning a initial duty cycle of 50%.
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Generally speaking this duty cycle is calculated as follows:
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Duty cycle = (CCR3 / ARR) * 100
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The timer output channel is mapped on the pin PB.0 (connected to LED1 on board
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NUCLEO-F767ZI). Thus LED1 status (on/off) mirrors the timer output
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level (active v.s. inactive).
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User push-button can be used to change the duty cycle from 0% up to 100% by
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steps of 10%. Duty cycle is periodically measured. It can be observed through
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the debugger by watching the variable uwMeasuredDutyCycle.
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Initially the output channel is configured in output compare toggle mode.
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@note The LED1 is not toggling. In fact, if the dutycycle is 0% so the LED1 is OFF. When pushing
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successively the user button, the LED1 is ON and its luminosity rises as the dutycycle value keep
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increasing.
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@par Keywords
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Timers, Output, signal, PWM, Oscilloscope, Frequency, Duty cycle, Waveform
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@Note<74>If the user code size exceeds the DTCM-RAM size or starts from internal cacheable memories (SRAM1 and SRAM2),that is shared between several processors,
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<20><><EFBFBD><EFBFBD><EFBFBD>then it is highly recommended to enable the CPU cache and maintain its coherence at application level.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>The address and the size of cacheable buffers (shared between CPU and other masters) must be properly updated to be aligned to cache line size (32 bytes).
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@Note It is recommended to enable the cache and maintain its coherence, but depending on the use case
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> It is also possible to configure the MPU as "Write through", to guarantee the write access coherence.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>In that case, the MPU must be configured as Cacheable/Bufferable/Not Shareable.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Even though the user must manage the cache coherence for read accesses.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Please refer to the AN4838 <20>Managing memory protection unit (MPU) in STM32 MCUs<55>
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Please refer to the AN4839 <20>Level 1 cache on STM32F7 Series<65>
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@par Directory contents
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- TIM/TIM_PWMOutput/Inc/stm32f7xx_it.h Interrupt handlers header file
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- TIM/TIM_PWMOutput/Inc/main.h Header for main.c module
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- TIM/TIM_PWMOutput/Inc/stm32_assert.h Template file to include assert_failed function
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- TIM/TIM_PWMOutput/Src/stm32f7xx_it.c Interrupt handlers
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- TIM/TIM_PWMOutput/Src/main.c Main program
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- TIM/TIM_PWMOutput/Src/system_stm32f7xx.c STM32F7xx system source file
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@par Hardware and Software environment
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- This example runs on STM32F767xx devices.
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- This example has been tested with NUCLEO-F767ZI board and can be
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easily tailored to any other supported device and development board.
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@par How to use it ?
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In order to make the program work, you must do the following :
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- Open your preferred toolchain
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- Rebuild all files and load your image into target memory
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- Run the example
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*/
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