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/** @page TIM_InputCapture TIM example @verbatim ****************************************************************************** * @file Examples_LL/TIM/TIM_InputCapture/readme.txt * @author MCD Application Team * @brief Description of the TIM_InputCapture example. ****************************************************************************** * @attention * * Copyright (c) 2016 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file * in the root directory of this software component. * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** @endverbatim @par Example Description Use of the TIM peripheral to measure a periodic signal frequency provided either by an external signal generator or by another timer instance. This example is based on the STM32F7xx TIM LL API. The peripheral initialization uses LL unitary service functions for optimization purposes (performance and size). TIM1_CH1 is configured in input capture mode. The TIM1CLK frequency is set to its maximum value (Prescaler is 0) in order to get the best possible resolution. So the TIM1 counter clock is SystemCoreClock. SystemCoreClock is set to 216 MHz for STM32F7xx Devices. The "uwMeasuredFrequency" variable contains the measured signal frequency. It is calculated within the capture/compare 1 interrupt service routine. The minimum frequency value to measure is TIM1 counter clock / TIMx_CCR1 MAX = 216 MHz / 65535 Due to TIM1_CC_IRQHandler processing time (around 3.50us), the maximum frequency value to measure is around 300 kHz. TIM2_CH1 is configured to generate a PWM signal. User push-button can be used to change the frequency of this signal from 4 kHz up to 22 kHz by steps of 2 kHz. It is then possible to run this example without a signal generator by connecting TIM2_CH1 to TIM1_CH1. @par Keywords Timers, DMA, Frequency, Input, Capture, External Signal, Measurement @Note<74>If the user code size exceeds the DTCM-RAM size or starts from internal cacheable memories (SRAM1 and SRAM2),that is shared between several processors, <20><><A0><A0><A0>then it is highly recommended to enable the CPU cache and maintain its coherence at application level. <0A><><A0><A0><A0><A0>The address and the size of cacheable buffers (shared between CPU and other masters) must be properly updated to be aligned to cache line size (32 bytes). @Note It is recommended to enable the cache and maintain its coherence, but depending on the use case <0A><><A0><A0><A0> It is also possible to configure the MPU as "Write through", to guarantee the write access coherence. <0A><><A0><A0><A0><A0>In that case, the MPU must be configured as Cacheable/Bufferable/Not Shareable. <0A><><A0><A0><A0><A0>Even though the user must manage the cache coherence for read accesses. <0A><><A0><A0><A0><A0>Please refer to the AN4838 <20>Managing memory protection unit (MPU) in STM32 MCUs<55> <0A><><A0><A0><A0><A0>Please refer to the AN4839 <20>Level 1 cache on STM32F7 Series<65> @par Directory contents - TIM/TIM_InputCapture/Inc/stm32f7xx_it.h Interrupt handlers header file - TIM/TIM_InputCapture/Inc/main.h Header for main.c module - TIM/TIM_InputCapture/Inc/stm32_assert.h Template file to include assert_failed function - TIM/TIM_InputCapture/Src/stm32f7xx_it.c Interrupt handlers - TIM/TIM_InputCapture/Src/main.c Main program - TIM/TIM_InputCapture/Src/system_stm32f7xx.c STM32F7xx system source file @par Hardware and Software environment - This example runs on STM32F767xx devices. - This example has been tested with NUCLEO-F767ZI board and can be easily tailored to any other supported device and development board. - NUCLEO-F767ZI Set-up - When no signal generator is used TIM2_CH1 can be connected to TIM1_CH1: - TIM1_CH1 PE.09: connected to pin 4 of CN10 connector - TIM2_CH1 PA.00: connected to pin 29 of CN10 connector @par How to use it ? In order to make the program work, you must do the following : - Open your preferred toolchain - Rebuild all files and load your image into target memory - Run the example */