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STM32CubeF7/Projects/STM32F767ZI-Nucleo/Examples_LL/ADC/ADC_AnalogWatchdog/Src/main.c
Tasnim 767d083e20 Release v1.17.2
2024-06-06 15:48:41 +01:00

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/**
******************************************************************************
* @file Examples_LL/ADC/ADC_AnalogWatchdog/Src/main.c
* @author MCD Application Team
* @brief This example describes how to use a ADC peripheral
* with ADC analog watchdog to monitor a channel and detect
* when the corresponding conversion data is out of window thresholds.
* This example is based on the STM32F7xx ADC LL API;
* Peripheral initialization done using LL unitary services functions.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/** @addtogroup STM32F7xx_LL_Examples
* @{
*/
/** @addtogroup ADC_AnalogWatchdog
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Definitions of ADC hardware constraints delays */
/* Note: Only ADC IP HW delays are defined in ADC LL driver driver, */
/* not timeout values: */
/* Timeout values for ADC operations are dependent to device clock */
/* configuration (system clock versus ADC clock), */
/* and therefore must be defined in user application. */
/* Refer to @ref ADC_LL_EC_HW_DELAYS for description of ADC timeout */
/* values definition. */
/* Timeout values for ADC operations. */
/* (enable settling time, disable settling time, ...) */
/* Values defined to be higher than worst cases: low clock frequency, */
/* maximum prescalers. */
/* Example of profile very low frequency : ADC clock frequency 36MHz */
/* prescaler 2, sampling time 56 ADC clock cycles, resolution 12 bits. */
/* - ADC enable time: maximum delay is 3 us */
/* (refer to device datasheet, parameter "tSTAB") */
/* - ADC disable time: maximum delay should be a few ADC clock cycles */
/* - ADC stop conversion time: maximum delay should be a few ADC clock */
/* cycles */
/* - ADC conversion time: with this hypothesis of clock settings, maximum */
/* delay will be 99us. */
/* (refer to device reference manual, section "Timing") */
/* Unit: ms */
#define ADC_CALIBRATION_TIMEOUT_MS ((uint32_t) 1)
#define ADC_ENABLE_TIMEOUT_MS ((uint32_t) 1)
#define ADC_DISABLE_TIMEOUT_MS ((uint32_t) 1)
#define ADC_STOP_CONVERSION_TIMEOUT_MS ((uint32_t) 1)
#define ADC_CONVERSION_TIMEOUT_MS ((uint32_t) 2)
/* Definitions of environment analog values */
/* Value of analog reference voltage (Vref+), connected to analog voltage */
/* supply Vdda (unit: mV). */
#define VDDA_APPLI ((uint32_t)3300)
/* Definitions of data related to this example */
/* Definition of ADCx analog watchdog window thresholds */
/* Value of ADC analog watchdog threshold high */
#define ADC_AWD_THRESHOLD_HIGH (__LL_ADC_DIGITAL_SCALE(LL_ADC_RESOLUTION_12B)/2)
/* Value of ADC analog watchdog threshold low */
#define ADC_AWD_THRESHOLD_LOW ((uint32_t) 0)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Variable to report status of ADC analog watchdog 1: */
/* 0: ADC conversion data into AWD window */
/* 1: ADC conversion data out of AWD window */
__IO uint8_t ubAnalogWatchdog1Status = 0; /* Variable set into analog watchdog 1 interruption callback */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void Configure_ADC(void);
void Activate_ADC(void);
void LED_Init(void);
void LED_On(void);
void LED_Off(void);
void LED_Blinking(uint32_t Period);
void UserButton_Init(void);
static void CPU_CACHE_Enable(void);
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/* Enable the CPU Cache */
CPU_CACHE_Enable();
/* Configure the system clock to 216 MHz */
SystemClock_Config();
/* Initialize LED1 */
LED_Init();
/* Initialize button in EXTI mode */
UserButton_Init();
/* Configure ADC */
/* Note: This function configures the ADC but does not enable it. */
/* To enable it, use function "Activate_ADC()". */
/* This is intended to optimize power consumption: */
/* 1. ADC configuration can be done once at the beginning */
/* (ADC disabled, minimal power consumption) */
/* 2. ADC enable (higher power consumption) can be done just before */
/* ADC conversions needed. */
/* Then, possible to perform successive "Activate_ADC()", */
/* "Deactivate_ADC()", ..., without having to set again */
/* ADC configuration. */
Configure_ADC();
/* Activate ADC */
/* Perform ADC activation procedure to make it ready to convert. */
Activate_ADC();
/* Start ADC group regular conversion */
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, in order to be compliant with other STM32 series */
/* and to show the best practice usages, ADC state is checked. */
/* Software can be optimized by removing some of these checks, if */
/* they are not relevant considering previous settings and actions */
/* in user application. */
if (LL_ADC_IsEnabled(ADC1) == 1)
{
LL_ADC_REG_StartConversionSWStart(ADC1);
}
else
{
/* Error: ADC conversion start could not be performed */
LED_Blinking(LED_BLINK_ERROR);
}
/* Infinite loop */
while (1)
{
/* Note: LED state depending on ADC analog watchdog 1 status */
/* and status variable "ubAnalogWatchdog1Status" */
/* are set into ADC analog watchdog 1 IRQ handler, */
/* refer to function "AdcAnalogWatchdog1_Callback()". */
/* After analog watchdog interruption, press on push button */
/* to rearm ADC analog watchdog to be ready for another trig, */
/* refer to function "UserButton_Callback()". */
}
}
/**
* @brief Configure ADC (ADC instance: ADC1) and GPIO used by ADC channels.
* @note In case re-use of this function outside of this example:
* This function includes checks of ADC hardware constraints before
* executing some configuration functions.
* - In this example, all these checks are not necessary but are
* implemented anyway to show the best practice usages
* corresponding to reference manual procedure.
* (On some STM32 series, setting of ADC features are not
* conditioned to ADC state. However, in order to be compliant with
* other STM32 series and to show the best practice usages,
* ADC state is checked anyway with same constraints).
* Software can be optimized by removing some of these checks,
* if they are not relevant considering previous settings and actions
* in user application.
* - If ADC is not in the appropriate state to modify some parameters,
* the setting of these parameters is bypassed without error
* reporting:
* it can be the expected behavior in case of recall of this
* function to update only a few parameters (which update fulfills
* the ADC state).
* Otherwise, it is up to the user to set the appropriate error
* reporting in user application.
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_ADC(void)
{
/*## Configuration of GPIO used by ADC channels ############################*/
/* Note: On this STM32 device, ADC1 channel 4 is mapped on GPIO pin PA.04 */
/* Enable GPIO Clock */
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
/* Configure GPIO in analog mode to be used as ADC input */
LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_4, LL_GPIO_MODE_ANALOG);
/*## Configuration of NVIC #################################################*/
/* Configure NVIC to enable ADC1 interruptions */
NVIC_SetPriority(ADC_IRQn, 0);
NVIC_EnableIRQ(ADC_IRQn);
/*## Configuration of ADC ##################################################*/
/*## Configuration of ADC hierarchical scope: common to several ADC ########*/
/* Enable ADC clock (core clock) */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_ADC1);
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, in order to be compliant with other STM32 series */
/* and to show the best practice usages, ADC state is checked. */
/* Software can be optimized by removing some of these checks, if */
/* they are not relevant considering previous settings and actions */
/* in user application. */
if(__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE() == 0)
{
/* Note: Call of the functions below are commented because they are */
/* useless in this example: */
/* setting corresponding to default configuration from reset state. */
/* Set ADC clock (conversion clock) common to several ADC instances */
LL_ADC_SetCommonClock(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_CLOCK_SYNC_PCLK_DIV2);
/* Set ADC measurement path to internal channels */
// LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_PATH_INTERNAL_NONE);
/*## Configuration of ADC hierarchical scope: multimode ####################*/
/* Set ADC multimode configuration */
// LL_ADC_SetMultimode(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_MULTI_INDEPENDENT);
/* Set ADC multimode DMA transfer */
// LL_ADC_SetMultiDMATransfer(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_MULTI_REG_DMA_EACH_ADC);
/* Set ADC multimode: delay between 2 sampling phases */
// LL_ADC_SetMultiTwoSamplingDelay(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE);
}
/*## Configuration of ADC hierarchical scope: ADC instance #################*/
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, ADC state is checked anyway with standard requirements */
/* (refer to description of this function). */
if (LL_ADC_IsEnabled(ADC1) == 0)
{
/* Note: Call of the functions below are commented because they are */
/* useless in this example: */
/* setting corresponding to default configuration from reset state. */
/* Set ADC data resolution */
// LL_ADC_SetResolution(ADC1, LL_ADC_RESOLUTION_12B);
/* Set ADC conversion data alignment */
// LL_ADC_SetResolution(ADC1, LL_ADC_DATA_ALIGN_RIGHT);
/* Set Set ADC sequencers scan mode, for all ADC groups */
/* (group regular, group injected). */
// LL_ADC_SetSequencersScanMode(ADC1, LL_ADC_SEQ_SCAN_DISABLE);
}
/*## Configuration of ADC hierarchical scope: ADC group regular ############*/
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, ADC state is checked anyway with standard requirements */
/* (refer to description of this function). */
if (LL_ADC_IsEnabled(ADC1) == 0)
{
/* Set ADC group regular trigger source */
LL_ADC_REG_SetTriggerSource(ADC1, LL_ADC_REG_TRIG_SOFTWARE);
/* Set ADC group regular trigger polarity */
// LL_ADC_REG_SetTriggerEdge(ADC1, LL_ADC_REG_TRIG_EXT_RISING);
/* Set ADC group regular continuous mode */
LL_ADC_REG_SetContinuousMode(ADC1, LL_ADC_REG_CONV_CONTINUOUS);
/* Set ADC group regular conversion data transfer */
// LL_ADC_REG_SetDMATransfer(ADC1, LL_ADC_REG_DMA_TRANSFER_NONE);
/* Specify which ADC flag between EOC (end of unitary conversion) */
/* or EOS (end of sequence conversions) is used to indicate */
/* the end of conversion. */
// LL_ADC_REG_SetFlagEndOfConversion(ADC1, LL_ADC_REG_FLAG_EOC_SEQUENCE_CONV);
/* Set ADC group regular sequencer */
/* Note: On this STM32 series, ADC group regular sequencer is */
/* fully configurable: sequencer length and each rank */
/* affectation to a channel are configurable. */
/* Refer to description of function */
/* "LL_ADC_REG_SetSequencerLength()". */
/* Set ADC group regular sequencer length and scan direction */
LL_ADC_REG_SetSequencerLength(ADC1, LL_ADC_REG_SEQ_SCAN_DISABLE);
/* Set ADC group regular sequencer discontinuous mode */
// LL_ADC_REG_SetSequencerDiscont(ADC1, LL_ADC_REG_SEQ_DISCONT_DISABLE);
/* Set ADC group regular sequence: channel on the selected sequence rank. */
LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_1, LL_ADC_CHANNEL_4);
}
/*## Configuration of ADC hierarchical scope: ADC group injected ###########*/
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, ADC state is checked anyway with standard requirements */
/* (refer to description of this function). */
if (LL_ADC_IsEnabled(ADC1) == 0)
{
/* Note: Call of the functions below are commented because they are */
/* useless in this example: */
/* setting corresponding to default configuration from reset state. */
/* Set ADC group injected trigger source */
// LL_ADC_INJ_SetTriggerSource(ADC1, LL_ADC_INJ_TRIG_SOFTWARE);
/* Set ADC group injected trigger polarity */
// LL_ADC_INJ_SetTriggerEdge(ADC1, LL_ADC_INJ_TRIG_EXT_RISING);
/* Set ADC group injected conversion trigger */
// LL_ADC_INJ_SetTrigAuto(ADC1, LL_ADC_INJ_TRIG_INDEPENDENT);
/* Set ADC group injected sequencer */
/* Note: On this STM32 series, ADC group injected sequencer is */
/* fully configurable: sequencer length and each rank */
/* affectation to a channel are configurable. */
/* Refer to description of function */
/* "LL_ADC_INJ_SetSequencerLength()". */
/* Set ADC group injected sequencer length and scan direction */
// LL_ADC_INJ_SetSequencerLength(ADC1, LL_ADC_INJ_SEQ_SCAN_DISABLE);
/* Set ADC group injected sequencer discontinuous mode */
// LL_ADC_INJ_SetSequencerDiscont(ADC1, LL_ADC_INJ_SEQ_DISCONT_DISABLE);
/* Set ADC group injected sequence: channel on the selected sequence rank. */
// LL_ADC_INJ_SetSequencerRanks(ADC1, LL_ADC_INJ_RANK_1, LL_ADC_CHANNEL_4);
}
/*## Configuration of ADC hierarchical scope: channels #####################*/
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, in order to be compliant with other STM32 series */
/* and to show the best practice usages, ADC state is checked. */
/* Software can be optimized by removing some of these checks, if */
/* they are not relevant considering previous settings and actions */
/* in user application. */
if (LL_ADC_IsEnabled(ADC1) == 0)
{
/* Set ADC channels sampling time */
/* Note: Considering interruption occurring after each ADC conversion */
/* when ADC conversion is out of the analog watchdog window */
/* selected (IT from ADC analog watchdog), */
/* select sampling time and ADC clock with sufficient */
/* duration to not create an overhead situation in IRQHandler. */
LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_4, LL_ADC_SAMPLINGTIME_56CYCLES);
}
/*## Configuration of ADC transversal scope: analog watchdog ###############*/
/* Note: On this STM32 series, there is only 1 analog watchdog available. */
/* Set ADC analog watchdog: channels to be monitored */
LL_ADC_SetAnalogWDMonitChannels(ADC1, LL_ADC_AWD_ALL_CHANNELS_REG);
/* Set ADC analog watchdog: thresholds */
LL_ADC_SetAnalogWDThresholds(ADC1, LL_ADC_AWD_THRESHOLD_HIGH, ADC_AWD_THRESHOLD_HIGH);
LL_ADC_SetAnalogWDThresholds(ADC1, LL_ADC_AWD_THRESHOLD_LOW, ADC_AWD_THRESHOLD_LOW);
/*## Configuration of ADC transversal scope: oversampling ##################*/
/* Note: Feature not available on this STM32 series */
/*## Configuration of ADC interruptions ####################################*/
/* Enable ADC analog watchdog 1 interruption */
LL_ADC_EnableIT_AWD1(ADC1);
}
/**
* @brief Perform ADC activation procedure to make it ready to convert
* (ADC instance: ADC1).
* @note Operations:
* - ADC instance
* - Enable ADC
* - ADC group regular
* none: ADC conversion start-stop to be performed
* after this function
* - ADC group injected
* none: ADC conversion start-stop to be performed
* after this function
* @param None
* @retval None
*/
void Activate_ADC(void)
{
#if (USE_TIMEOUT == 1)
uint32_t Timeout = 0; /* Variable used for timeout management */
#endif /* USE_TIMEOUT */
/*## Operation on ADC hierarchical scope: ADC instance #####################*/
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, in order to be compliant with other STM32 series */
/* and to show the best practice usages, ADC state is checked. */
/* Software can be optimized by removing some of these checks, if */
/* they are not relevant considering previous settings and actions */
/* in user application. */
if (LL_ADC_IsEnabled(ADC1) == 0)
{
/* Enable ADC */
LL_ADC_Enable(ADC1);
}
/*## Operation on ADC hierarchical scope: ADC group regular ################*/
/* Note: No operation on ADC group regular performed here. */
/* ADC group regular conversions to be performed after this function */
/* using function: */
/* "LL_ADC_REG_StartConversion();" */
/*## Operation on ADC hierarchical scope: ADC group injected ###############*/
/* Note: No operation on ADC group injected performed here. */
/* ADC group injected conversions to be performed after this function */
/* using function: */
/* "LL_ADC_INJ_StartConversion();" */
}
/**
* @brief Initialize LED1.
* @param None
* @retval None
*/
void LED_Init(void)
{
/* Enable the LED1 Clock */
LED1_GPIO_CLK_ENABLE();
/* Configure IO in output push-pull mode to drive external LED1 */
LL_GPIO_SetPinMode(LED1_GPIO_PORT, LED1_PIN, LL_GPIO_MODE_OUTPUT);
/* Reset value is LL_GPIO_OUTPUT_PUSHPULL */
//LL_GPIO_SetPinOutputType(LED1_GPIO_PORT, LED1_PIN, LL_GPIO_OUTPUT_PUSHPULL);
/* Reset value is LL_GPIO_SPEED_FREQ_LOW */
//LL_GPIO_SetPinSpeed(LED1_GPIO_PORT, LED1_PIN, LL_GPIO_SPEED_FREQ_LOW);
/* Reset value is LL_GPIO_PULL_NO */
//LL_GPIO_SetPinPull(LED1_GPIO_PORT, LED1_PIN, LL_GPIO_PULL_NO);
}
/**
* @brief Turn-on LED1.
* @param None
* @retval None
*/
void LED_On(void)
{
/* Turn LED1 on */
LL_GPIO_SetOutputPin(LED1_GPIO_PORT, LED1_PIN);
}
/**
* @brief Turn-off LED1.
* @param None
* @retval None
*/
void LED_Off(void)
{
/* Turn LED1 off */
LL_GPIO_ResetOutputPin(LED1_GPIO_PORT, LED1_PIN);
}
/**
* @brief Set LED1 to Blinking mode for an infinite loop (toggle period based on value provided as input parameter).
* @param Period : Period of time (in ms) between each toggling of LED
* This parameter can be user defined values. Pre-defined values used in that example are :
* @arg LED_BLINK_FAST : Fast Blinking
* @arg LED_BLINK_SLOW : Slow Blinking
* @arg LED_BLINK_ERROR : Error specific Blinking
* @retval None
*/
void LED_Blinking(uint32_t Period)
{
/* Turn LED1 on */
LL_GPIO_SetOutputPin(LED1_GPIO_PORT, LED1_PIN);
/* Toggle IO in an infinite loop */
while (1)
{
LL_GPIO_TogglePin(LED1_GPIO_PORT, LED1_PIN);
LL_mDelay(Period);
}
}
/**
* @brief Configures User push-button in EXTI Line Mode.
* @param None
* @retval None
*/
void UserButton_Init(void)
{
/* Enable the BUTTON Clock */
USER_BUTTON_GPIO_CLK_ENABLE();
/* Configure GPIO for BUTTON */
LL_GPIO_SetPinMode(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_MODE_INPUT);
LL_GPIO_SetPinPull(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_PULL_NO);
/* if(Button_Mode == BUTTON_MODE_EXTI) */
{
/* Connect External Line to the GPIO */
USER_BUTTON_SYSCFG_SET_EXTI();
/* Enable a rising trigger EXTI line 13 Interrupt */
USER_BUTTON_EXTI_LINE_ENABLE();
USER_BUTTON_EXTI_FALLING_TRIG_ENABLE();
/* Configure NVIC for USER_BUTTON_EXTI_IRQn */
NVIC_EnableIRQ(USER_BUTTON_EXTI_IRQn);
NVIC_SetPriority(USER_BUTTON_EXTI_IRQn,0x03);
}
}
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 216000000
* HCLK(Hz) = 216000000
* AHB Prescaler = 1
* APB1 Prescaler = 4
* APB2 Prescaler = 2
* HSI Frequency(Hz) = 8000000
* PLL_M = 8
* PLL_N = 432
* PLL_P = 2
* VDD(V) = 3.3
* Main regulator output voltage = Scale1 mode
* Flash Latency(WS) = 7
* @param None
* @retval None
*/
void SystemClock_Config(void)
{
/* Enable HSE clock */
LL_RCC_HSE_EnableBypass();
LL_RCC_HSE_Enable();
while(LL_RCC_HSE_IsReady() != 1)
{
};
/* Set FLASH latency */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_7);
/* Enable PWR clock */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
/* Activation OverDrive Mode */
LL_PWR_EnableOverDriveMode();
while(LL_PWR_IsActiveFlag_OD() != 1)
{
};
/* Activation OverDrive Switching */
LL_PWR_EnableOverDriveSwitching();
while(LL_PWR_IsActiveFlag_ODSW() != 1)
{
};
/* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLLM_DIV_8, 432, LL_RCC_PLLP_DIV_2);
LL_RCC_PLL_Enable();
while(LL_RCC_PLL_IsReady() != 1)
{
};
/* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
};
/* Set APB1 & APB2 prescaler */
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_4);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_2);
/* Set systick to 1ms */
SysTick_Config(216000000 / 1000);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
SystemCoreClock = 216000000;
}
/**
* @brief CPU L1-Cache enable.
* @param None
* @retval None
*/
static void CPU_CACHE_Enable(void)
{
/* Enable I-Cache */
SCB_EnableICache();
/* Enable D-Cache */
SCB_EnableDCache();
}
/******************************************************************************/
/* USER IRQ HANDLER TREATMENT */
/******************************************************************************/
/**
* @brief Function to manage IRQ Handler
* @param None
* @retval None
*/
void UserButton_Callback(void)
{
/* Rearm ADC analog watchdog to be ready for another trig */
/* Turn LED1 off */
LED_Off();
/* Reset status variable of ADC analog watchdog 1 */
ubAnalogWatchdog1Status = 0;
/* Clear flag ADC analog watchdog 1 */
LL_ADC_ClearFlag_AWD1(ADC1);
/* Enable ADC analog watchdog 1 interruption */
LL_ADC_EnableIT_AWD1(ADC1);
}
/**
* @brief ADC analog watchdog 1 interruption callback
* @note This function is executed when the ADC conversion data is
* out of analog watchdog 1 window thresholds.
* @retval None
*/
void AdcAnalogWatchdog1_Callback()
{
/* Disable ADC analog watchdog 1 interruption */
LL_ADC_DisableIT_AWD1(ADC1);
/* Update status variable of ADC analog watchdog 1 */
ubAnalogWatchdog1Status = 1;
/* Set LED depending on ADC analog watchdog status */
/* - Turn-on if voltage is out of AWD window */
LED_On();
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
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