mirror of
https://github.com/STMicroelectronics/STM32CubeF7.git
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193 lines
5.7 KiB
C
193 lines
5.7 KiB
C
/**
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******************************************************************************
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* @file Examples_LL/UTILS/UTILS_ConfigureSystemClock/Src/main.c
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* @author MCD Application Team
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* @brief This example describes how to configure system clock using PLL with
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* HSI as source clock through the STM32F7xx UTILS LL API.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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/** @addtogroup STM32F7xx_LL_Examples
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* @{
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*/
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/** @addtogroup UTILS_ConfigureSystemClock
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Variable to store PLL parameters */
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/* Configuration will allow to reach a SYSCLK frequency set to 216MHz:
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Syst freq = ((HSI_VALUE / PLLM) * PLLN)/ PLLR)
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((16MHz /8) * 216)/ 2) = 216MHz */
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LL_UTILS_PLLInitTypeDef sUTILS_PLLInitStruct = {LL_RCC_PLLM_DIV_8, 216, LL_RCC_PLLP_DIV_2}; ;
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/* Variable to store AHB and APB buses clock configuration */
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/* Settings to have HCLK set to 108MHz, APB1 to 54MHz and APB2 to 108MHz */
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LL_UTILS_ClkInitTypeDef sUTILS_ClkInitStruct = {LL_RCC_SYSCLK_DIV_2, LL_RCC_APB1_DIV_4, LL_RCC_APB2_DIV_2};
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/* Private function prototypes -----------------------------------------------*/
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void LED_Init(void);
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void MCO_ConfigGPIO(void);
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static void CPU_CACHE_Enable(void);
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/* Private functions ---------------------------------------------------------*/
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/**
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* @brief Main program
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* @param None
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* @retval None
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*/
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int main(void)
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{
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/* Enable the CPU Cache */
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CPU_CACHE_Enable();
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/* System started with default clock used after reset */
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/* Set FLASH latency */
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LL_FLASH_SetLatency(LL_FLASH_LATENCY_7);
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/* Enable PWR clock */
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
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/* Activation OverDrive Mode */
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LL_PWR_EnableOverDriveMode();
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while(LL_PWR_IsActiveFlag_OD() != 1)
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{
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};
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/* Activation OverDrive Switching */
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LL_PWR_EnableOverDriveSwitching();
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while(LL_PWR_IsActiveFlag_ODSW() != 1)
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{
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};
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/* Switch to PLL with HSI as clock source */
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LL_PLL_ConfigSystemClock_HSI(&sUTILS_PLLInitStruct, &sUTILS_ClkInitStruct);
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/*
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CMSIS variable automatically updated according to new configuration.
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SystemCoreClock should be equal to calculated HCLK frequency.
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FLASH latency is also tuned according to system constraints described
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in the reference manual.
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*/
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/* Set Systick to 1ms in using frequency set to SystemCoreClock */
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LL_Init1msTick(SystemCoreClock);
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/* Initialize LED1 */
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LED_Init();
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/* Configure SYSCLK for MCO */
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MCO_ConfigGPIO();
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/* Toggle LED1 in an infinite loop with a period of 1Hz */
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while (1)
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{
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LL_GPIO_TogglePin(LED1_GPIO_PORT, LED1_PIN);
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LL_mDelay(1000);
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}
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}
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/**
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* @brief Initialize LED1.
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* @param None
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* @retval None
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*/
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void LED_Init(void)
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{
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/* Enable the LED1 Clock */
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LED1_GPIO_CLK_ENABLE();
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/* Configure IO in output push-pull mode to drive external LED1 */
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LL_GPIO_SetPinMode(LED1_GPIO_PORT, LED1_PIN, LL_GPIO_MODE_OUTPUT);
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/* Reset value is LL_GPIO_OUTPUT_PUSHPULL */
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//LL_GPIO_SetPinOutputType(LED1_GPIO_PORT, LED1_PIN, LL_GPIO_OUTPUT_PUSHPULL);
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/* Reset value is LL_GPIO_SPEED_FREQ_LOW */
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//LL_GPIO_SetPinSpeed(LED1_GPIO_PORT, LED1_PIN, LL_GPIO_SPEED_FREQ_LOW);
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/* Reset value is LL_GPIO_PULL_NO */
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//LL_GPIO_SetPinPull(LED1_GPIO_PORT, LED1_PIN, LL_GPIO_PULL_NO);
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/* Select MCO clock source and prescaler */
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LL_RCC_ConfigMCO(LL_RCC_MCO1SOURCE_PLLCLK, LL_RCC_MCO1_DIV_4);
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}
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/**
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* @brief Configure MCO pin (PA8).
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* @param None
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* @retval None
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*/
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void MCO_ConfigGPIO(void)
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{
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/* MCO Clock Enable */
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LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
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/* Configure the MCO pin in alternate function mode */
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LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_8, LL_GPIO_MODE_ALTERNATE);
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LL_GPIO_SetPinOutputType(GPIOA, LL_GPIO_PIN_8, LL_GPIO_OUTPUT_PUSHPULL);
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LL_GPIO_SetPinSpeed(GPIOA, LL_GPIO_PIN_8, LL_GPIO_SPEED_FREQ_HIGH);
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LL_GPIO_SetPinPull(GPIOA, LL_GPIO_PIN_8, LL_GPIO_PULL_NO);
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LL_GPIO_SetAFPin_8_15(GPIOA, LL_GPIO_PIN_8, LL_GPIO_AF_0);
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}
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#ifdef USE_FULL_ASSERT
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/**
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* @brief Reports the name of the source file and the source line number
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* where the assert_param error has occurred.
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* @param file: pointer to the source file name
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* @param line: assert_param error line source number
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* @retval None
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*/
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void assert_failed(uint8_t *file, uint32_t line)
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{
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/* User can add his own implementation to report the file name and line number,
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ex: printf("Wrong parameters value: file %s on line %d", file, line) */
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/* Infinite loop */
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while (1)
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{
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}
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}
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#endif
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/**
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* @brief CPU L1-Cache enable.
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* @param None
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* @retval None
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*/
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static void CPU_CACHE_Enable(void)
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{
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/* Enable I-Cache */
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SCB_EnableICache();
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/* Enable D-Cache */
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SCB_EnableDCache();
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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