mirror of
https://github.com/STMicroelectronics/STM32CubeF7.git
synced 2025-05-05 19:30:14 +08:00
330 lines
9.6 KiB
C
330 lines
9.6 KiB
C
/**
|
|
******************************************************************************
|
|
* @file FMC/FMC_SRAM/Src/main.c
|
|
* @author MCD Application Team
|
|
* @brief This example describes how to configure and use GPIOs through
|
|
* the STM32F7xx HAL API.
|
|
******************************************************************************
|
|
* @attention
|
|
*
|
|
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
|
* All rights reserved.</center></h2>
|
|
*
|
|
* This software component is licensed by ST under BSD 3-Clause license,
|
|
* the "License"; You may not use this file except in compliance with the
|
|
* License. You may obtain a copy of the License at:
|
|
* opensource.org/licenses/BSD-3-Clause
|
|
*
|
|
******************************************************************************
|
|
*/
|
|
|
|
/* Includes ------------------------------------------------------------------*/
|
|
#include "main.h"
|
|
|
|
/** @addtogroup STM32F7xx_HAL_Examples
|
|
* @{
|
|
*/
|
|
|
|
/** @addtogroup FMC_SRAM
|
|
* @{
|
|
*/
|
|
|
|
/* Private typedef -----------------------------------------------------------*/
|
|
/* Private define ------------------------------------------------------------*/
|
|
#define BUFFER_SIZE ((uint32_t)0x1000)
|
|
#define WRITE_READ_ADDR ((uint32_t)0x0800)
|
|
|
|
/* Private macro -------------------------------------------------------------*/
|
|
/* Private variables ---------------------------------------------------------*/
|
|
SRAM_HandleTypeDef hsram;
|
|
FMC_NORSRAM_TimingTypeDef SRAM_Timing;
|
|
|
|
/* Read/Write Buffers */
|
|
uint16_t aTxBuffer[BUFFER_SIZE];
|
|
uint16_t aRxBuffer[BUFFER_SIZE];
|
|
|
|
/* Status variables */
|
|
__IO uint32_t uwWriteReadStatus = 0;
|
|
|
|
/* Counter index */
|
|
uint32_t uwIndex = 0;
|
|
|
|
/* Private function prototypes -----------------------------------------------*/
|
|
void SystemClock_Config(void);
|
|
static void Error_Handler(void);
|
|
static void Fill_Buffer(uint16_t *pBuffer, uint32_t uwBufferLenght, uint16_t uwOffset);
|
|
static TestStatus Buffercmp(uint16_t *pBuffer1, uint16_t *pBuffer2, uint16_t BufferLength);
|
|
static void CPU_CACHE_Enable(void);
|
|
|
|
/* Private functions ---------------------------------------------------------*/
|
|
|
|
/**
|
|
* @brief Main program
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
int main(void)
|
|
{
|
|
/* Enable the CPU Cache */
|
|
CPU_CACHE_Enable();
|
|
|
|
/* STM32F7xx HAL library initialization:
|
|
- Configure the Flash ART accelerator on ITCM interface
|
|
- Systick timer is configured by default as source of time base, but user
|
|
can eventually implement his proper time base source (a general purpose
|
|
timer for example or other time source), keeping in mind that Time base
|
|
duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
|
|
handled in milliseconds basis.
|
|
- Set NVIC Group Priority to 4
|
|
- Low Level Initialization
|
|
*/
|
|
HAL_Init();
|
|
|
|
/* Configure the system clock to 216 MHz */
|
|
SystemClock_Config();
|
|
|
|
/* Configure LED1 and LED3 */
|
|
BSP_LED_Init(LED1);
|
|
BSP_LED_Init(LED3);
|
|
|
|
/*##-1- Configure the SRAM device ##########################################*/
|
|
/* SRAM device configuration */
|
|
|
|
hsram.Instance = FMC_NORSRAM_DEVICE;
|
|
hsram.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
|
|
|
|
SRAM_Timing.AddressSetupTime = 2;
|
|
SRAM_Timing.AddressHoldTime = 1;
|
|
SRAM_Timing.DataSetupTime = 2;
|
|
SRAM_Timing.BusTurnAroundDuration = 1;
|
|
SRAM_Timing.CLKDivision = 2;
|
|
SRAM_Timing.DataLatency = 2;
|
|
SRAM_Timing.AccessMode = FMC_ACCESS_MODE_A;
|
|
|
|
hsram.Init.NSBank = FMC_NORSRAM_BANK3;
|
|
hsram.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
|
|
hsram.Init.MemoryType = FMC_MEMORY_TYPE_SRAM;
|
|
hsram.Init.MemoryDataWidth = SRAM_MEMORY_WIDTH;
|
|
hsram.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
|
|
hsram.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
|
|
hsram.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
|
|
hsram.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
|
|
hsram.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
|
|
hsram.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
|
|
hsram.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
|
|
hsram.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
|
|
hsram.Init.ContinuousClock = SRAM_CONTINUOUS_CLOCK;
|
|
|
|
/* Initialize the SRAM controller */
|
|
if(HAL_SRAM_Init(&hsram, &SRAM_Timing, &SRAM_Timing) != HAL_OK)
|
|
{
|
|
/* Initialization Error */
|
|
Error_Handler();
|
|
}
|
|
|
|
/*##-2- SRAM memory read/write access ######################################*/
|
|
/* Fill the buffer to write */
|
|
Fill_Buffer(aTxBuffer, BUFFER_SIZE, 0xC20F);
|
|
|
|
/* Write data to the SRAM memory */
|
|
for (uwIndex = 0; uwIndex < BUFFER_SIZE; uwIndex++)
|
|
{
|
|
*(__IO uint16_t*) (SRAM_BANK_ADDR + WRITE_READ_ADDR + 2*uwIndex) = aTxBuffer[uwIndex];
|
|
}
|
|
|
|
/* Read back data from the SRAM memory */
|
|
for (uwIndex = 0; uwIndex < BUFFER_SIZE; uwIndex++)
|
|
{
|
|
aRxBuffer[uwIndex] = *(__IO uint16_t*) (SRAM_BANK_ADDR + WRITE_READ_ADDR + 2*uwIndex);
|
|
}
|
|
|
|
/*##-3- Checking data integrity ############################################*/
|
|
uwWriteReadStatus = Buffercmp(aTxBuffer, aRxBuffer, BUFFER_SIZE);
|
|
|
|
|
|
if (uwWriteReadStatus != PASSED)
|
|
{
|
|
/* KO */
|
|
/* Toggle LED3 */
|
|
while(1)
|
|
{
|
|
BSP_LED_Toggle(LED3);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* OK */
|
|
/* Turn on LED1 */
|
|
BSP_LED_On(LED1);
|
|
}
|
|
|
|
/* Infinite loop */
|
|
while (1)
|
|
{
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief System Clock Configuration
|
|
* The system Clock is configured as follow :
|
|
* System Clock source = PLL (HSE)
|
|
* SYSCLK(Hz) = 216000000
|
|
* HCLK(Hz) = 216000000
|
|
* AHB Prescaler = 1
|
|
* APB1 Prescaler = 4
|
|
* APB2 Prescaler = 2
|
|
* HSE Frequency(Hz) = 25000000
|
|
* PLL_M = 25
|
|
* PLL_N = 432
|
|
* PLL_P = 2
|
|
* PLL_Q = 9
|
|
* VDD(V) = 3.3
|
|
* Main regulator output voltage = Scale1 mode
|
|
* Flash Latency(WS) = 7
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
void SystemClock_Config(void)
|
|
{
|
|
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
|
RCC_OscInitTypeDef RCC_OscInitStruct;
|
|
HAL_StatusTypeDef ret = HAL_OK;
|
|
|
|
/* Enable HSE Oscillator and activate PLL with HSE as source */
|
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
|
RCC_OscInitStruct.PLL.PLLM = 25;
|
|
RCC_OscInitStruct.PLL.PLLN = 432;
|
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
|
RCC_OscInitStruct.PLL.PLLQ = 9;
|
|
|
|
ret = HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
|
if(ret != HAL_OK)
|
|
{
|
|
while(1) { ; }
|
|
}
|
|
|
|
/* Activate the OverDrive to reach the 216 MHz Frequency */
|
|
ret = HAL_PWREx_EnableOverDrive();
|
|
if(ret != HAL_OK)
|
|
{
|
|
while(1) { ; }
|
|
}
|
|
|
|
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
|
|
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
|
|
|
ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7);
|
|
if(ret != HAL_OK)
|
|
{
|
|
while(1) { ; }
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief This function is executed in case of error occurrence.
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void Error_Handler(void)
|
|
{
|
|
/* User may add here some code to deal with this error */
|
|
/* Turn LED3 on */
|
|
BSP_LED_On(LED3);
|
|
while(1)
|
|
{
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Fills buffer with user predefined data.
|
|
* @param pBuffer: pointer on the buffer to fill
|
|
* @param uwBufferLenght: size of the buffer to fill
|
|
* @param uwOffset: first value to fill on the buffer
|
|
* @retval None
|
|
*/
|
|
static void Fill_Buffer(uint16_t *pBuffer, uint32_t uwBufferLenght, uint16_t uwOffset)
|
|
{
|
|
uint16_t tmpIndex = 0;
|
|
|
|
/* Put in global buffer different values */
|
|
for (tmpIndex = 0; tmpIndex < uwBufferLenght; tmpIndex++ )
|
|
{
|
|
pBuffer[tmpIndex] = tmpIndex + uwOffset;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Compares two buffers.
|
|
* @param pBuffer1, pBuffer2: buffers to be compared.
|
|
* @param BufferLength: buffer's length
|
|
* @retval PASSED: pBuffer identical to pBuffer1
|
|
* FAILED: pBuffer differs from pBuffer1
|
|
*/
|
|
static TestStatus Buffercmp(uint16_t* pBuffer1, uint16_t* pBuffer2, uint16_t BufferLength)
|
|
{
|
|
while (BufferLength--)
|
|
{
|
|
if (*pBuffer1 != *pBuffer2)
|
|
{
|
|
return FAILED;
|
|
}
|
|
|
|
pBuffer1++;
|
|
pBuffer2++;
|
|
}
|
|
|
|
return PASSED;
|
|
}
|
|
|
|
/**
|
|
* @brief CPU L1-Cache enable.
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void CPU_CACHE_Enable(void)
|
|
{
|
|
/* Enable I-Cache */
|
|
SCB_EnableICache();
|
|
|
|
/* Enable D-Cache */
|
|
SCB_EnableDCache();
|
|
}
|
|
|
|
#ifdef USE_FULL_ASSERT
|
|
|
|
/**
|
|
* @brief Reports the name of the source file and the source line number
|
|
* where the assert_param error has occurred.
|
|
* @param file: pointer to the source file name
|
|
* @param line: assert_param error line source number
|
|
* @retval None
|
|
*/
|
|
void assert_failed(uint8_t *file, uint32_t line)
|
|
{
|
|
/* User can add his own implementation to report the file name and line number,
|
|
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
|
|
|
|
/* Infinite loop */
|
|
while (1)
|
|
{
|
|
}
|
|
}
|
|
#endif
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|