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109 lines
4.9 KiB
Plaintext
109 lines
4.9 KiB
Plaintext
/**
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@page TIM_OCToggle TIM_OCToggle example
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@verbatim
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******************************************************************************
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* @file TIM/TIM_OCToggle/readme.txt
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* @author MCD Application Team
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* @brief This example shows how to configure the Timer to generate four different
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* signals with four different frequencies.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@endverbatim
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@par Example Description
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Configuration of the TIM peripheral to generate four different
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signals at four different frequencies.
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The TIM1 frequency is set to SystemCoreClock, and the objective is
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to get TIM1 counter clock at 21.6 MHz so the Prescaler is computed as following:
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- Prescaler = (TIM1CLK /TIM1 counter clock) - 1
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SystemCoreClock is set to 216 MHz for STM32F7xx Devices.
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The TIM1 CCR1 register value is equal to 40961:
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CC1 update rate = TIM1 counter clock / CCR1_Val = 527.330 Hz,
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so the TIM1 Channel 1 generates a periodic signal with a frequency equal to 263.66 Hz.
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The TIM1 CCR2 register value is equal to 20480:
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CC2 update rate = TIM1 counter clock / CCR2_Val = 1054.687 Hz,
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so the TIM1 channel 2 generates a periodic signal with a frequency equal to 527.34 Hz.
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The TIM1 CCR3 register value is equal to 10240:
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CC3 update rate = TIM1 counter clock / CCR3_Val = 2109.375 Hz,
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so the TIM1 channel 3 generates a periodic signal with a frequency equal to 1054.68 Hz.
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The TIM1 CCR4 register value is equal to 5120:
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CC4 update rate = TIM1 counter clock / CCR4_Val = 4218.750 Hz,
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so the TIM1 channel 4 generates a periodic signal with a frequency equal to 2109.37 Hz.
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@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
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based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
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a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
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than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
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To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
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@note The application need to ensure that the SysTick time base is always set to 1 millisecond
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to have correct HAL operation.
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@par Keywords
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Timers, Output, signals, Output compare toggle, PWM, Oscilloscope
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@Note<74>If the user code size exceeds the DTCM-RAM size or starts from internal cacheable memories (SRAM1 and SRAM2),that is shared between several processors,
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<20><><EFBFBD><EFBFBD><EFBFBD>then it is highly recommended to enable the CPU cache and maintain its coherence at application level.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>The address and the size of cacheable buffers (shared between CPU and other masters) must be properly updated to be aligned to cache line size (32 bytes).
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@Note It is recommended to enable the cache and maintain its coherence, but depending on the use case
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> It is also possible to configure the MPU as "Write through", to guarantee the write access coherence.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>In that case, the MPU must be configured as Cacheable/Bufferable/Not Shareable.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Even though the user must manage the cache coherence for read accesses.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Please refer to the AN4838 <20>Managing memory protection unit (MPU) in STM32 MCUs<55>
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Please refer to the AN4839 <20>Level 1 cache on STM32F7 Series<65>
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@par Directory contents
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- TIM/TIM_OCToggle/Inc/stm32f7xx_hal_conf.h HAL configuration file
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- TIM/TIM_OCToggle/Inc/stm32f7xx_it.h Interrupt handlers header file
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- TIM/TIM_OCToggle/Inc/main.h Header for main.c module
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- TIM/TIM_OCToggle/Src/stm32f7xx_it.c Interrupt handlers
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- TIM/TIM_OCToggle/Src/main.c Main program
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- TIM/TIM_OCToggle/Src/stm32f7xx_hal_msp.c HAL MSP file
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- TIM/TIM_OCToggle/Src/system_stm32f7xx.c STM32F7xx system source file
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@par Hardware and Software environment
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- This example runs on STM32756xx devices.
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- This example has been tested with STMicroelectronics STM327x6G-EVAL revB
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board and can be easily tailored to any other supported device
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and development board.
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- STM327x6G-EVAL revB Set-up
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Connect the following pins to an oscilloscope to monitor the different waveforms:
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- PA.08: (TIM1_CH1) ((pin 52 in CN6 connector))
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- PA.09: (TIM1_CH2) ((pin 43 in CN6 connector))
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- PA.10: (TIM1_CH3) ((pin 44 in CN6 connector))
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- PE.14: (TIM1_CH4) ((pin 20 in CN10 connector))
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@par How to use it ?
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In order to make the program work, you must do the following :
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- Open your preferred toolchain
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- Rebuild all files and load your image into target memory
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- Run the example
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*/
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