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/**
@page LTDC_Display_1Layer LTDC Display Layer 1 example
@verbatim
******************************************************************************
* @file LTDC/LTDC_Display_1Layer/readme.txt
* @author MCD Application Team
* @brief Description of the LTDC Display 1 layer example.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@endverbatim
@par Example Description
How to configure the LTDC peripheral to display a 480x272 RGB888 (24 bits/pixel)
image on LCD using only one layer.
At the beginning of the main program the HAL_Init() function is called to reset
all the peripherals, initialize the Flash interface and the systick.
Then the SystemClock_Config() function is used to configure the system
clock (SYSCLK) to run at 216 MHz.
After LCD initialization, the LCD layer 1 is configured to display image
(modelled by an array) loaded directly from flash memory by LTDC integrated DMA.
LCD_TFT synchronous timings configuration :
-------------------------------------------
Total Width
<--------------------------------------------------->
Hsync width HBP Active Width HFP
<---><--><--------------------------------------><-->
____ ____|_______________________________________|____
|___| | | |
| | |
__| | | |
/|\ /|\ | | | |
| VSYNC| | | | |
|Width\|/ |__ | | |
| /|\ | | | |
| VBP | | | | |
| \|/_____|_________|_______________________________________| |
| /|\ | | / / / / / / / / / / / / / / / / / / / | |
| | | |/ / / / / / / / / / / / / / / / / / / /| |
Total | | | |/ / / / / / / / / / / / / / / / / / / /| |
Heigh | | | |/ / / / / / / / / / / / / / / / / / / /| |
|Active| | |/ / / / / / / / / / / / / / / / / / / /| |
|Heigh | | |/ / / / / / Active Display Area / / / /| |
| | | |/ / / / / / / / / / / / / / / / / / / /| |
| | | |/ / / / / / / / / / / / / / / / / / / /| |
| | | |/ / / / / / / / / / / / / / / / / / / /| |
| | | |/ / / / / / / / / / / / / / / / / / / /| |
| | | |/ / / / / / / / / / / / / / / / / / / /| |
| \|/_____|_________|_______________________________________| |
| /|\ | |
| VFP | | |
\|/ \|/_____|______________________________________________________|
Each LCD device has its specific synchronous timings values.
This example uses AM480272H3TMQW-T01H LCD (MB1046 B-01) and configures
the synchronous timings as following :
Horizontal Synchronization (Hsync) = 41
Horizontal Back Porch (HBP) = 2
Active Width = 480
Horizontal Front Porch (HFP) = 2
Vertical Synchronization (Vsync) = 10
Vertical Back Porch (VBP) = 2
Active Heigh = 272
Vertical Front Porch (VFP) = 2
LCD_TFT windowing configuration :
---------------------------------
To configure the active display window, this example configures the
horizontal/vertical start and stop.
HorizontalStart = (Offset_X + Hsync + HBP);
HorizontalStop = (Offset_X + Hsync + HBP + Window_Width - 1);
VarticalStart = (Offset_Y + Vsync + VBP);
VerticalStop = (Offset_Y + Vsync + VBP + Window_Heigh - 1);
Window_width and Window_heigh should be in line with the image size to be
displayed.
STM32 Eval board's LED can be used to monitor the transfer status:
- LED3 is ON when there is an error in Init process.
@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
@note The application need to ensure that the SysTick time base is always set to 1 millisecond
to have correct HAL operation.
@par Keywords
Display, LTDC, Display Controller, TFT, LCD, Graphic, RGB888, 1 Layer, BMP,
@Note<74>If the user code size exceeds the DTCM-RAM size or starts from internal cacheable memories (SRAM1 and SRAM2),that is shared between several processors,
<20><><A0><A0><A0>then it is highly recommended to enable the CPU cache and maintain its coherence at application level.
<0A><><A0><A0><A0><A0>The address and the size of cacheable buffers (shared between CPU and other masters) must be properly updated to be aligned to cache line size (32 bytes).
@Note It is recommended to enable the cache and maintain its coherence, but depending on the use case
<0A><><A0><A0><A0> It is also possible to configure the MPU as "Write through", to guarantee the write access coherence.
<0A><><A0><A0><A0><A0>In that case, the MPU must be configured as Cacheable/Bufferable/Not Shareable.
<0A><><A0><A0><A0><A0>Even though the user must manage the cache coherence for read accesses.
<0A><><A0><A0><A0><A0>Please refer to the AN4838 <20>Managing memory protection unit (MPU) in STM32 MCUs<55>
<0A><><A0><A0><A0><A0>Please refer to the AN4839 <20>Level 1 cache on STM32F7 Series<65>
@par Directory contents
- LTDC/LTDC_Display_2Layers/Inc/stm32f7xx_hal_conf.h HAL configuration file
- LTDC/LTDC_Display_2Layers/Inc/stm32f7xx_it.h Interrupt handlers header file
- LTDC/LTDC_Display_2Layers/Inc/main.h Main configuration file
- LTDC/LTDC_Display_2Layers/Src/stm32f7xx_it.c Interrupt handlers
- LTDC/LTDC_Display_2Layers/Src/main.c Main program
- LTDC/LTDC_Display_2Layers/Src/stm32f7xx_hal_msp.c HAL MSP module
- LTDC/LTDC_Display_2Layers/Src/system_stm32f7xx.c STM32F7xx system clock configuration file
- LTDC/LTDC_Display_2Layers/Inc/RGB565_480x272.h Image of size 480x272 and format RGB565 to be displayed on LCD
@par Hardware and Software environment
- This example runs on STM32F756xx/STM32F746xx devices.
- This example has been tested with STM327x6G-EVAL board revB and can be
easily tailored to any other supported device and development board.
@par How to use it ?
In order to make the program work, you must do the following :
- Open your preferred toolchain
- Rebuild all files and load your image into target memory
- Run the example
*/