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118 lines
4.7 KiB
Plaintext
118 lines
4.7 KiB
Plaintext
/**
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@page TIM_Synchronization Timers Synchronization example
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@verbatim
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******************** (C) COPYRIGHT 2017 STMicroelectronics *******************
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* @file TIM/TIM_Synchronization/readme.txt
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* @author MCD Application Team
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* @brief How to command 2 Timers as slaves (TIM3 & TIM4) using a Timer
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* as master (TIM1)
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*
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******************************************************************************
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*
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* Copyright (c) 2017 STMicroelectronics. All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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@endverbatim
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@par Example Description
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This example shows how to synchronize TIM1 and Timers (TIM3 and TIM4) in parallel mode.
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Timers synchronization in parallel mode:
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___________
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ITR0 | SLAVE 1 |
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_________________| TIM3 |
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___________ | |___________|
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| MASTER |TRGO_Update |
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| TIM1 |---------------------|
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|___________| | ___________
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|_________________| SLAVE 2 |
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ITR0 | TIM4 |
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|___________|
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1/ TIM1 is configured as Master Timer:
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- PWM Mode is used
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- The TIM1 Update event is used as Trigger Output
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2/ TIM3 and TIM4 are slaves for TIM1,
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- PWM Mode is used
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- The ITR0(TIM1) is used as input trigger for both slaves
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- Gated mode is used, so starts and stops of slaves counters
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are controlled by the Master trigger output signal(update event).
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The TIM1 counter clock is 180 MHz.
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The Master Timer TIM1 is running at:
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TIM1 frequency = TIM1 counter clock / (TIM1_Period + 1) = 703 KHz
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and the duty cycle is equal to: TIM1_CCR1/(TIM1_ARR + 1) = 50%
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The TIM3 is running at:
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(TIM1 frequency)/ ((TIM3 period +1)* (TIM1_Repetition_Counter+1)) = 46.866 KHz and
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a duty cycle equal to TIM3_CCR1/(TIM3_ARR + 1) = 33.3%
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The TIM4 is running at:
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(TIM1 frequency)/ ((TIM4 period +1)* (Repetition_Counter+1)) = 70.300 KHz and
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a duty cycle equal to TIM4_CCR1/(TIM4_ARR + 1) = 50%
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The PWM waveform can be displayed using an oscilloscope.
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@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
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based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
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a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
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than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
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To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
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@note The application needs to ensure that the SysTick time base is always set to 1 millisecond
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to have correct HAL operation.
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@par Keywords
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Timers, PWM, Parallel synchronization, Master, Slave, Duty Cycle, Waveform,
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Oscilloscope, Output, Signal
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@par Directory contents
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- TIM/TIM_Synchronization/Inc/stm32f4xx_hal_conf.h HAL configuration file
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- TIM/TIM_Synchronization/Inc/stm32f4xx_it.h Interrupt handlers header file
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- TIM/TIM_Synchronization/Inc/main.h Main program header file
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- TIM/TIM_Synchronization/Src/stm32f4xx_it.c Interrupt handlers
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- TIM/TIM_Synchronization/Src/main.c Main program
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- TIM/TIM_Synchronization/Src/stm32f4xx_hal_msp.c HAL MSP module
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- TIM/TIM_Synchronization/Src/system_stm32f4xx.c STM32F4xx system clock configuration file
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@par Hardware and Software environment
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- This example runs on STM32F429xx/STM32F439xx devices.
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- This example has been tested with STMicroelectronics STM324x9I-EVAL RevB
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evaluation boards and can be easily tailored to any other supported device and development board
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- STM324x9I-EVAL RevB Set-up
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Connect the following pins to an oscilloscope to monitor the different waveforms:
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- TIM1 CH1 (PA.08)
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- TIM3 CH1 (PC.06)
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- TIM4 CH1 (PB.06)
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@par How to use it ?
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In order to make the program work, you must do the following :
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- Open your preferred toolchain
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- Rebuild all files and load your image into target memory
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- Run the example
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* <h3><center>© COPYRIGHT STMicroelectronics</center></h3>
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*/
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