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102 lines
4.4 KiB
Plaintext
102 lines
4.4 KiB
Plaintext
/**
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@page TIM_OCToggle TIM_OCToggle example
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@verbatim
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******************** (C) COPYRIGHT 2017 STMicroelectronics *******************
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* @file TIM/TIM_OCToggle/readme.txt
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* @author MCD Application Team
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* @brief This example shows how to configure the Timer to generate four different
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* signals with four different frequencies.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@endverbatim
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@par Example Description
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This example shows how to configure the TIM peripheral to generate four different
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signals with four different frequencies.
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The TIM4 frequency is set to SystemCoreClock, and the objective is
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to get TIM4 counter clock at 12.5 MHz so the Prescaler is computed as following:
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- Prescaler = (TIM4CLK /TIM4 counter clock) - 1
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SystemCoreClock is set to 100 MHz for STM32F4xx Devices.
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The TIM4 CCR1 register value is equal to 32051:
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CC1 update rate = TIM4 counter clock / CCR1_Val = 390 Hz,
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so the TIM4 Channel 1 generates a periodic signal with a frequency equal to 195 Hz.
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The TIM4 CCR2 register value is equal to 16025:
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CC2 update rate = TIM4 counter clock / CCR2_Val = 780 Hz,
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so the TIM4 channel 2 generates a periodic signal with a frequency equal to 390 Hz.
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The TIM4 CCR3 register value is equal to 8012:
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CC3 update rate = TIM4 counter clock / CCR3_Val = 1560 Hz,
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so the TIM4 channel 3 generates a periodic signal with a frequency equal to 780 Hz.
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The TIM4 CCR4 register value is equal to 4006:
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CC4 update rate = TIM4 counter clock / CCR4_Val = 3120 Hz,
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so the TIM4 channel 4 generates a periodic signal with a frequency equal to 1560 Hz.
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@note PWM signal frequency values mentioned above are theoretical (obtained when the system clock frequency
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is exactly 100 MHz). Since the generated system clock frequency may vary from one board to another observed
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PWM signal frequency might be slightly different.
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@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
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based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
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a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
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than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
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To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
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@note The application need to ensure that the SysTick time base is always set to 1 millisecond
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to have correct HAL operation.
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@par Keywords
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Timers, Output, signals, Output compare toggle, PWM, Oscilloscope
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@par Directory contents
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- TIM/TIM_OCToggle/Inc/stm32f4xx_hal_conf.h HAL configuration file
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- TIM/TIM_OCToggle/Inc/stm32f4xx_it.h Interrupt handlers header file
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- TIM/TIM_OCToggle/Inc/main.h Header for main.c module
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- TIM/TIM_OCToggle/Src/stm32f4xx_it.c Interrupt handlers
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- TIM/TIM_OCToggle/Src/main.c Main program
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- TIM/TIM_OCToggle/Src/stm32f4xx_hal_msp.c HAL MSP file
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- TIM/TIM_OCToggle/Src/system_stm32f4xx.c STM32F4xx system source file
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@par Hardware and Software environment
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- This example runs on STM32F412xG devices.
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- This example has been tested with STMicroelectronics STM32412G-DISCOVERY
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board and can be easily tailored to any other supported device
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and development board.
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- STM32412G-DISCOVERY Set-up
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Connect the following pins to an oscilloscope to monitor the different waveforms:
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- PB.06: (TIM4_CH1) (connected to PB.06 (pin 23 in P2 connector))
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- PB.07: (TIM4_CH2) (connected to PB.07 (pin 24 in P2 connector))
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- PB.08: (TIM4_CH3) (connected to PB.08 (pin 19 in P2 connector))
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- PB.09: (TIM4_CH4) (connected to PB.09 (pin 20 in P2 connector))
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@par How to use it ?
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In order to make the program work, you must do the following :
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- Open your preferred toolchain
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- Rebuild all files and load your image into target memory
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- Run the example
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*/
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