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Release v1.27.1

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Eya 2022-07-05 11:07:36 +01:00
parent 3d6be4bd40
commit 52757b5e33
13 changed files with 553 additions and 408 deletions
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11
Drivers/CMSIS/Device/ST/STM32F4xx/README.md
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@ -27,16 +27,7 @@ Details about the content of this release are available in the release note [her
## Compatibility information
In this table, you can find the successive versions of this CMSIS Device component, in-line with the corresponding versions of the full MCU package:
CMSIS Device F4 | CMSIS Core | Was delivered in the full MCU package
--------------- | ---------- | -------------------------------------
Tag v2.6.5 | Tag v5.4.0_cm4 | Tag v1.25.0
Tag v2.6.5 | Tag v5.4.0_cm4 | Tag v1.25.1
Tag v2.6.5 | Tag v5.4.0_cm4 | Tag v1.25.2
Tag v2.6.6 | Tag v5.4.0_cm4 | Tag v1.26.0
Tag v2.6.7 | Tag v5.4.0_cm4 | Tag v1.26.2
Tag v2.6.8 | Tag v5.4.0_cm4 | Tag v1.27.0
It is **crucial** that you use a consistent set of versions for the CMSIS Core - CMSIS Device, as mentioned in [this](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/STM32CubeF4/blob/master/Release_Notes.html) release note.
The full **STM32CubeF4** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeF4).

76
Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
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@ -37,14 +37,16 @@ extern "C" {
#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
#if defined(STM32U5)
#if defined(STM32U5) || defined(STM32H7) || defined(STM32MP1)
#define CRYP_DATATYPE_32B CRYP_NO_SWAP
#define CRYP_DATATYPE_16B CRYP_HALFWORD_SWAP
#define CRYP_DATATYPE_8B CRYP_BYTE_SWAP
#define CRYP_DATATYPE_1B CRYP_BIT_SWAP
#if defined(STM32U5)
#define CRYP_CCF_CLEAR CRYP_CLEAR_CCF
#define CRYP_ERR_CLEAR CRYP_CLEAR_RWEIF
#endif /* STM32U5 */
#endif /* STM32U5 || STM32H7 || STM32MP1 */
/**
* @}
*/
@ -110,6 +112,7 @@ extern "C" {
#define ADC_SAMPLETIME_391CYCLES_5 ADC_SAMPLETIME_391CYCLES
#define ADC4_SAMPLETIME_160CYCLES_5 ADC4_SAMPLETIME_814CYCLES_5
#endif /* STM32U5 */
/**
* @}
*/
@ -231,8 +234,11 @@ extern "C" {
/** @defgroup CRC_Aliases CRC API aliases
* @{
*/
#if defined(STM32C0)
#else
#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for inter STM32 series compatibility */
#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for inter STM32 series compatibility */
#endif
/**
* @}
*/
@ -499,7 +505,7 @@ extern "C" {
#define OB_RDP_LEVEL0 OB_RDP_LEVEL_0
#define OB_RDP_LEVEL1 OB_RDP_LEVEL_1
#define OB_RDP_LEVEL2 OB_RDP_LEVEL_2
#if defined(STM32G0)
#if defined(STM32G0) || defined(STM32C0)
#define OB_BOOT_LOCK_DISABLE OB_BOOT_ENTRY_FORCED_NONE
#define OB_BOOT_LOCK_ENABLE OB_BOOT_ENTRY_FORCED_FLASH
#else
@ -568,7 +574,6 @@ extern "C" {
#define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD
#endif /* STM32G4 */
/**
* @}
*/
@ -668,6 +673,10 @@ extern "C" {
#if defined(STM32U5)
#define GPIO_AF0_RTC_50Hz GPIO_AF0_RTC_50HZ
#endif /* STM32U5 */
#if defined(STM32U5)
#define GPIO_AF0_S2DSTOP GPIO_AF0_SRDSTOP
#define GPIO_AF11_LPGPIO GPIO_AF11_LPGPIO1
#endif /* STM32U5 */
/**
* @}
*/
@ -1080,8 +1089,8 @@ extern "C" {
#define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
#define RTC_TIMESTAMPPIN_PC13 RTC_TIMESTAMPPIN_DEFAULT
#define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1
#define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1
#define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1
#define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1
#define RTC_TIMESTAMPPIN_PC1 RTC_TIMESTAMPPIN_POS2
#define RTC_OUTPUT_REMAP_PC13 RTC_OUTPUT_REMAP_NONE
@ -1092,15 +1101,22 @@ extern "C" {
#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
#if defined(STM32F7)
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_IT_ENABLE_BITS_MASK
#endif /* STM32F7 */
#if defined(STM32H7)
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_X
#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_X_INTERRUPT
#endif /* STM32H7 */
#if defined(STM32F7) || defined(STM32H7)
#define RTC_TAMPER1_INTERRUPT RTC_IT_TAMP1
#define RTC_TAMPER2_INTERRUPT RTC_IT_TAMP2
#define RTC_TAMPER3_INTERRUPT RTC_IT_TAMP3
#define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMPALL
#endif /* STM32H7 */
#define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMP
#endif /* STM32F7 || STM32H7 */
/**
* @}
@ -3407,7 +3423,7 @@ extern "C" {
#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || defined(STM32WL)
#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || defined(STM32WL) || defined(STM32C0)
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
#else
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@ -3520,8 +3536,8 @@ extern "C" {
#define RCC_DFSDM2CLKSOURCE_APB2 RCC_DFSDM2CLKSOURCE_PCLK2
#define RCC_FMPI2C1CLKSOURCE_APB RCC_FMPI2C1CLKSOURCE_PCLK1
#if defined(STM32U5)
#define MSIKPLLModeSEL RCC_MSIKPLL_MODE_SEL
#define MSISPLLModeSEL RCC_MSISPLL_MODE_SEL
#define MSIKPLLModeSEL RCC_MSIKPLL_MODE_SEL
#define MSISPLLModeSEL RCC_MSISPLL_MODE_SEL
#define __HAL_RCC_AHB21_CLK_DISABLE __HAL_RCC_AHB2_1_CLK_DISABLE
#define __HAL_RCC_AHB22_CLK_DISABLE __HAL_RCC_AHB2_2_CLK_DISABLE
#define __HAL_RCC_AHB1_CLK_Disable_Clear __HAL_RCC_AHB1_CLK_ENABLE
@ -3537,15 +3553,20 @@ extern "C" {
#define RCC_CLK48CLKSOURCE_PLL2 RCC_ICLK_CLKSOURCE_PLL2
#define RCC_CLK48CLKSOURCE_PLL1 RCC_ICLK_CLKSOURCE_PLL1
#define RCC_CLK48CLKSOURCE_MSIK RCC_ICLK_CLKSOURCE_MSIK
#define __HAL_RCC_ADC1_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE
#define __HAL_RCC_ADC1_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE
#define __HAL_RCC_ADC1_IS_CLK_ENABLED __HAL_RCC_ADC12_IS_CLK_ENABLED
#define __HAL_RCC_ADC1_IS_CLK_DISABLED __HAL_RCC_ADC12_IS_CLK_DISABLED
#define __HAL_RCC_ADC1_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET
#define __HAL_RCC_ADC1_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET
#define __HAL_RCC_ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC12_CLK_SLEEP_ENABLE
#define __HAL_RCC_ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC12_CLK_SLEEP_DISABLE
#endif
#define __HAL_RCC_ADC1_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE
#define __HAL_RCC_ADC1_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE
#define __HAL_RCC_ADC1_IS_CLK_ENABLED __HAL_RCC_ADC12_IS_CLK_ENABLED
#define __HAL_RCC_ADC1_IS_CLK_DISABLED __HAL_RCC_ADC12_IS_CLK_DISABLED
#define __HAL_RCC_ADC1_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET
#define __HAL_RCC_ADC1_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET
#define __HAL_RCC_ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC12_CLK_SLEEP_ENABLE
#define __HAL_RCC_ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC12_CLK_SLEEP_DISABLE
#define __HAL_RCC_GET_CLK48_SOURCE __HAL_RCC_GET_ICLK_SOURCE
#define __HAL_RCC_PLLFRACN_ENABLE __HAL_RCC_PLL_FRACN_ENABLE
#define __HAL_RCC_PLLFRACN_DISABLE __HAL_RCC_PLL_FRACN_DISABLE
#define __HAL_RCC_PLLFRACN_CONFIG __HAL_RCC_PLL_FRACN_CONFIG
#define IS_RCC_PLLFRACN_VALUE IS_RCC_PLL_FRACN_VALUE
#endif /* STM32U5 */
/**
* @}
@ -3563,7 +3584,9 @@ extern "C" {
/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
* @{
*/
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5)
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx)|| \
defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
defined (STM32C0)
#else
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
#endif
@ -3616,7 +3639,6 @@ extern "C" {
#define __RTC_WRITEPROTECTION_ENABLE __HAL_RTC_WRITEPROTECTION_ENABLE
#define __RTC_WRITEPROTECTION_DISABLE __HAL_RTC_WRITEPROTECTION_DISABLE
/**
* @}
*/
@ -3628,7 +3650,7 @@ extern "C" {
#define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE
#define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS
#if !defined(STM32F1) && !defined(STM32F2) && !defined(STM32F4) && !defined(STM32F7) && !defined(STM32L1)
#if !defined(STM32F1) && !defined(STM32F2) && !defined(STM32F4) && !defined(STM32L1)
#define eMMC_HIGH_VOLTAGE_RANGE EMMC_HIGH_VOLTAGE_RANGE
#define eMMC_DUAL_VOLTAGE_RANGE EMMC_DUAL_VOLTAGE_RANGE
#define eMMC_LOW_VOLTAGE_RANGE EMMC_LOW_VOLTAGE_RANGE
@ -3965,6 +3987,16 @@ extern "C" {
* @}
*/
/** @defgroup HAL_Generic_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
* @{
*/
#if defined (STM32F7)
#define ART_ACCLERATOR_ENABLE ART_ACCELERATOR_ENABLE
#endif /* STM32F7 */
/**
* @}
*/
/** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
* @{
*/

4
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_conf_template.h
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@ -209,8 +209,8 @@
#define MAC_ADDR5 0U
/* Definition of the Ethernet driver buffers size and count */
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
#define ETH_RX_BUF_SIZE 1528U /* ETH Max buffer size for receive */
#define ETH_TX_BUF_SIZE 1528U /* ETH Max buffer size for transmit */
#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */

283
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_eth.h
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@ -276,9 +276,6 @@ typedef struct
PreambleLength; /*!< Selects or not the Preamble Length for Transmit packets (Full Duplex mode).
This parameter can be a value of @ref ETH_Preamble_Length */
FunctionalState
UnicastSlowProtocolPacketDetect; /*!< Enable or disables the Detection of Slow Protocol Packets with unicast address. */
FunctionalState SlowProtocolDetect; /*!< Enable or disables the Slow Protocol Detection. */
FunctionalState CRCCheckingRxPackets; /*!< Enable or disables the CRC Checking for Received Packets. */
@ -404,7 +401,7 @@ typedef struct
typedef enum
{
HAL_ETH_MII_MODE = 0x00U, /*!< Media Independent Interface */
HAL_ETH_RMII_MODE = ((uint32_t)SYSCFG_PMC_MII_RMII_SEL) /*!< Reduced Media Independent Interface */
HAL_ETH_RMII_MODE = SYSCFG_PMC_MII_RMII_SEL /*!< Reduced Media Independent Interface */
} ETH_MediaInterfaceTypeDef;
/**
*
@ -694,51 +691,51 @@ typedef struct
/**
* @brief Bit definition of TDES0 register: DMA Tx descriptor status register
*/
#define ETH_DMATXDESC_OWN ((uint32_t)0x80000000U) /*!< OWN bit: descriptor is owned by DMA engine */
#define ETH_DMATXDESC_IC ((uint32_t)0x40000000U) /*!< Interrupt on Completion */
#define ETH_DMATXDESC_LS ((uint32_t)0x20000000U) /*!< Last Segment */
#define ETH_DMATXDESC_FS ((uint32_t)0x10000000U) /*!< First Segment */
#define ETH_DMATXDESC_DC ((uint32_t)0x08000000U) /*!< Disable CRC */
#define ETH_DMATXDESC_DP ((uint32_t)0x04000000U) /*!< Disable Padding */
#define ETH_DMATXDESC_TTSE ((uint32_t)0x02000000U) /*!< Transmit Time Stamp Enable */
#define ETH_DMATXDESC_CIC ((uint32_t)0x00C00000U) /*!< Checksum Insertion Control: 4 cases */
#define ETH_DMATXDESC_CIC_BYPASS ((uint32_t)0x00000000U) /*!< Do Nothing: Checksum Engine is bypassed */
#define ETH_DMATXDESC_CIC_IPV4HEADER ((uint32_t)0x00400000U) /*!< IPV4 header Checksum Insertion */
#define ETH_DMATXDESC_CIC_TCPUDPICMP_SEGMENT ((uint32_t)0x00800000U) /*!< TCP/UDP/ICMP Checksum Insertion calculated over segment only */
#define ETH_DMATXDESC_CIC_TCPUDPICMP_FULL ((uint32_t)0x00C00000U) /*!< TCP/UDP/ICMP Checksum Insertion fully calculated */
#define ETH_DMATXDESC_TER ((uint32_t)0x00200000U) /*!< Transmit End of Ring */
#define ETH_DMATXDESC_TCH ((uint32_t)0x00100000U) /*!< Second Address Chained */
#define ETH_DMATXDESC_TTSS ((uint32_t)0x00020000U) /*!< Tx Time Stamp Status */
#define ETH_DMATXDESC_IHE ((uint32_t)0x00010000U) /*!< IP Header Error */
#define ETH_DMATXDESC_ES ((uint32_t)0x00008000U) /*!< Error summary: OR of the following bits: UE || ED || EC || LCO || NC || LCA || FF || JT */
#define ETH_DMATXDESC_JT ((uint32_t)0x00004000U) /*!< Jabber Timeout */
#define ETH_DMATXDESC_FF ((uint32_t)0x00002000U) /*!< Frame Flushed: DMA/MTL flushed the frame due to SW flush */
#define ETH_DMATXDESC_PCE ((uint32_t)0x00001000U) /*!< Payload Checksum Error */
#define ETH_DMATXDESC_LCA ((uint32_t)0x00000800U) /*!< Loss of Carrier: carrier lost during transmission */
#define ETH_DMATXDESC_NC ((uint32_t)0x00000400U) /*!< No Carrier: no carrier signal from the transceiver */
#define ETH_DMATXDESC_LCO ((uint32_t)0x00000200U) /*!< Late Collision: transmission aborted due to collision */
#define ETH_DMATXDESC_EC ((uint32_t)0x00000100U) /*!< Excessive Collision: transmission aborted after 16 collisions */
#define ETH_DMATXDESC_VF ((uint32_t)0x00000080U) /*!< VLAN Frame */
#define ETH_DMATXDESC_CC ((uint32_t)0x00000078U) /*!< Collision Count */
#define ETH_DMATXDESC_ED ((uint32_t)0x00000004U) /*!< Excessive Deferral */
#define ETH_DMATXDESC_UF ((uint32_t)0x00000002U) /*!< Underflow Error: late data arrival from the memory */
#define ETH_DMATXDESC_DB ((uint32_t)0x00000001U) /*!< Deferred Bit */
#define ETH_DMATXDESC_OWN 0x80000000U /*!< OWN bit: descriptor is owned by DMA engine */
#define ETH_DMATXDESC_IC 0x40000000U /*!< Interrupt on Completion */
#define ETH_DMATXDESC_LS 0x20000000U /*!< Last Segment */
#define ETH_DMATXDESC_FS 0x10000000U /*!< First Segment */
#define ETH_DMATXDESC_DC 0x08000000U /*!< Disable CRC */
#define ETH_DMATXDESC_DP 0x04000000U /*!< Disable Padding */
#define ETH_DMATXDESC_TTSE 0x02000000U /*!< Transmit Time Stamp Enable */
#define ETH_DMATXDESC_CIC 0x00C00000U /*!< Checksum Insertion Control: 4 cases */
#define ETH_DMATXDESC_CIC_BYPASS 0x00000000U /*!< Do Nothing: Checksum Engine is bypassed */
#define ETH_DMATXDESC_CIC_IPV4HEADER 0x00400000U /*!< IPV4 header Checksum Insertion */
#define ETH_DMATXDESC_CIC_TCPUDPICMP_SEGMENT 0x00800000U /*!< TCP/UDP/ICMP Checksum Insertion calculated over segment only */
#define ETH_DMATXDESC_CIC_TCPUDPICMP_FULL 0x00C00000U /*!< TCP/UDP/ICMP Checksum Insertion fully calculated */
#define ETH_DMATXDESC_TER 0x00200000U /*!< Transmit End of Ring */
#define ETH_DMATXDESC_TCH 0x00100000U /*!< Second Address Chained */
#define ETH_DMATXDESC_TTSS 0x00020000U /*!< Tx Time Stamp Status */
#define ETH_DMATXDESC_IHE 0x00010000U /*!< IP Header Error */
#define ETH_DMATXDESC_ES 0x00008000U /*!< Error summary: OR of the following bits: UE || ED || EC || LCO || NC || LCA || FF || JT */
#define ETH_DMATXDESC_JT 0x00004000U /*!< Jabber Timeout */
#define ETH_DMATXDESC_FF 0x00002000U /*!< Frame Flushed: DMA/MTL flushed the frame due to SW flush */
#define ETH_DMATXDESC_PCE 0x00001000U /*!< Payload Checksum Error */
#define ETH_DMATXDESC_LCA 0x00000800U /*!< Loss of Carrier: carrier lost during transmission */
#define ETH_DMATXDESC_NC 0x00000400U /*!< No Carrier: no carrier signal from the transceiver */
#define ETH_DMATXDESC_LCO 0x00000200U /*!< Late Collision: transmission aborted due to collision */
#define ETH_DMATXDESC_EC 0x00000100U /*!< Excessive Collision: transmission aborted after 16 collisions */
#define ETH_DMATXDESC_VF 0x00000080U /*!< VLAN Frame */
#define ETH_DMATXDESC_CC 0x00000078U /*!< Collision Count */
#define ETH_DMATXDESC_ED 0x00000004U /*!< Excessive Deferral */
#define ETH_DMATXDESC_UF 0x00000002U /*!< Underflow Error: late data arrival from the memory */
#define ETH_DMATXDESC_DB 0x00000001U /*!< Deferred Bit */
/**
* @brief Bit definition of TDES1 register
*/
#define ETH_DMATXDESC_TBS2 ((uint32_t)0x1FFF0000U) /*!< Transmit Buffer2 Size */
#define ETH_DMATXDESC_TBS1 ((uint32_t)0x00001FFFU) /*!< Transmit Buffer1 Size */
#define ETH_DMATXDESC_TBS2 0x1FFF0000U /*!< Transmit Buffer2 Size */
#define ETH_DMATXDESC_TBS1 0x00001FFFU /*!< Transmit Buffer1 Size */
/**
* @brief Bit definition of TDES2 register
*/
#define ETH_DMATXDESC_B1AP ((uint32_t)0xFFFFFFFFU) /*!< Buffer1 Address Pointer */
#define ETH_DMATXDESC_B1AP 0xFFFFFFFFU /*!< Buffer1 Address Pointer */
/**
* @brief Bit definition of TDES3 register
*/
#define ETH_DMATXDESC_B2AP ((uint32_t)0xFFFFFFFFU) /*!< Buffer2 Address Pointer */
#define ETH_DMATXDESC_B2AP 0xFFFFFFFFU /*!< Buffer2 Address Pointer */
/*---------------------------------------------------------------------------------------------
TDES6 | Transmit Time Stamp Low [31:0] |
@ -747,10 +744,10 @@ TDES7 | Transmit Time Stamp High [31:0]
----------------------------------------------------------------------------------------------*/
/* Bit definition of TDES6 register */
#define ETH_DMAPTPTXDESC_TTSL ((uint32_t)0xFFFFFFFFU) /* Transmit Time Stamp Low */
#define ETH_DMAPTPTXDESC_TTSL 0xFFFFFFFFU /* Transmit Time Stamp Low */
/* Bit definition of TDES7 register */
#define ETH_DMAPTPTXDESC_TTSH ((uint32_t)0xFFFFFFFFU) /* Transmit Time Stamp High */
#define ETH_DMAPTPTXDESC_TTSH 0xFFFFFFFFU /* Transmit Time Stamp High */
/**
* @}
@ -777,44 +774,44 @@ TDES7 | Transmit Time Stamp High [31:0]
/**
* @brief Bit definition of RDES0 register: DMA Rx descriptor status register
*/
#define ETH_DMARXDESC_OWN ((uint32_t)0x80000000U) /*!< OWN bit: descriptor is owned by DMA engine */
#define ETH_DMARXDESC_AFM ((uint32_t)0x40000000U) /*!< DA Filter Fail for the rx frame */
#define ETH_DMARXDESC_FL ((uint32_t)0x3FFF0000U) /*!< Receive descriptor frame length */
#define ETH_DMARXDESC_ES ((uint32_t)0x00008000U) /*!< Error summary: OR of the following bits: DE || OE || IPC || LC || RWT || RE || CE */
#define ETH_DMARXDESC_DE ((uint32_t)0x00004000U) /*!< Descriptor error: no more descriptors for receive frame */
#define ETH_DMARXDESC_SAF ((uint32_t)0x00002000U) /*!< SA Filter Fail for the received frame */
#define ETH_DMARXDESC_LE ((uint32_t)0x00001000U) /*!< Frame size not matching with length field */
#define ETH_DMARXDESC_OE ((uint32_t)0x00000800U) /*!< Overflow Error: Frame was damaged due to buffer overflow */
#define ETH_DMARXDESC_VLAN ((uint32_t)0x00000400U) /*!< VLAN Tag: received frame is a VLAN frame */
#define ETH_DMARXDESC_FS ((uint32_t)0x00000200U) /*!< First descriptor of the frame */
#define ETH_DMARXDESC_LS ((uint32_t)0x00000100U) /*!< Last descriptor of the frame */
#define ETH_DMARXDESC_IPV4HCE ((uint32_t)0x00000080U) /*!< IPC Checksum Error: Rx Ipv4 header checksum error */
#define ETH_DMARXDESC_LC ((uint32_t)0x00000040U) /*!< Late collision occurred during reception */
#define ETH_DMARXDESC_FT ((uint32_t)0x00000020U) /*!< Frame type - Ethernet, otherwise 802.3 */
#define ETH_DMARXDESC_RWT ((uint32_t)0x00000010U) /*!< Receive Watchdog Timeout: watchdog timer expired during reception */
#define ETH_DMARXDESC_RE ((uint32_t)0x00000008U) /*!< Receive error: error reported by MII interface */
#define ETH_DMARXDESC_DBE ((uint32_t)0x00000004U) /*!< Dribble bit error: frame contains non int multiple of 8 bits */
#define ETH_DMARXDESC_CE ((uint32_t)0x00000002U) /*!< CRC error */
#define ETH_DMARXDESC_MAMPCE ((uint32_t)0x00000001U) /*!< Rx MAC Address/Payload Checksum Error: Rx MAC address matched/ Rx Payload Checksum Error */
#define ETH_DMARXDESC_OWN 0x80000000U /*!< OWN bit: descriptor is owned by DMA engine */
#define ETH_DMARXDESC_AFM 0x40000000U /*!< DA Filter Fail for the rx frame */
#define ETH_DMARXDESC_FL 0x3FFF0000U /*!< Receive descriptor frame length */
#define ETH_DMARXDESC_ES 0x00008000U /*!< Error summary: OR of the following bits: DE || OE || IPC || LC || RWT || RE || CE */
#define ETH_DMARXDESC_DE 0x00004000U /*!< Descriptor error: no more descriptors for receive frame */
#define ETH_DMARXDESC_SAF 0x00002000U /*!< SA Filter Fail for the received frame */
#define ETH_DMARXDESC_LE 0x00001000U /*!< Frame size not matching with length field */
#define ETH_DMARXDESC_OE 0x00000800U /*!< Overflow Error: Frame was damaged due to buffer overflow */
#define ETH_DMARXDESC_VLAN 0x00000400U /*!< VLAN Tag: received frame is a VLAN frame */
#define ETH_DMARXDESC_FS 0x00000200U /*!< First descriptor of the frame */
#define ETH_DMARXDESC_LS 0x00000100U /*!< Last descriptor of the frame */
#define ETH_DMARXDESC_IPV4HCE 0x00000080U /*!< IPC Checksum Error: Rx Ipv4 header checksum error */
#define ETH_DMARXDESC_LC 0x00000040U /*!< Late collision occurred during reception */
#define ETH_DMARXDESC_FT 0x00000020U /*!< Frame type - Ethernet, otherwise 802.3 */
#define ETH_DMARXDESC_RWT 0x00000010U /*!< Receive Watchdog Timeout: watchdog timer expired during reception */
#define ETH_DMARXDESC_RE 0x00000008U /*!< Receive error: error reported by MII interface */
#define ETH_DMARXDESC_DBE 0x00000004U /*!< Dribble bit error: frame contains non int multiple of 8 bits */
#define ETH_DMARXDESC_CE 0x00000002U /*!< CRC error */
#define ETH_DMARXDESC_MAMPCE 0x00000001U /*!< Rx MAC Address/Payload Checksum Error: Rx MAC address matched/ Rx Payload Checksum Error */
/**
* @brief Bit definition of RDES1 register
*/
#define ETH_DMARXDESC_DIC ((uint32_t)0x80000000U) /*!< Disable Interrupt on Completion */
#define ETH_DMARXDESC_RBS2 ((uint32_t)0x1FFF0000U) /*!< Receive Buffer2 Size */
#define ETH_DMARXDESC_RER ((uint32_t)0x00008000U) /*!< Receive End of Ring */
#define ETH_DMARXDESC_RCH ((uint32_t)0x00004000U) /*!< Second Address Chained */
#define ETH_DMARXDESC_RBS1 ((uint32_t)0x00001FFFU) /*!< Receive Buffer1 Size */
#define ETH_DMARXDESC_DIC 0x80000000U /*!< Disable Interrupt on Completion */
#define ETH_DMARXDESC_RBS2 0x1FFF0000U /*!< Receive Buffer2 Size */
#define ETH_DMARXDESC_RER 0x00008000U /*!< Receive End of Ring */
#define ETH_DMARXDESC_RCH 0x00004000U /*!< Second Address Chained */
#define ETH_DMARXDESC_RBS1 0x00001FFFU /*!< Receive Buffer1 Size */
/**
* @brief Bit definition of RDES2 register
*/
#define ETH_DMARXDESC_B1AP ((uint32_t)0xFFFFFFFFU) /*!< Buffer1 Address Pointer */
#define ETH_DMARXDESC_B1AP 0xFFFFFFFFU /*!< Buffer1 Address Pointer */
/**
* @brief Bit definition of RDES3 register
*/
#define ETH_DMARXDESC_B2AP ((uint32_t)0xFFFFFFFFU) /*!< Buffer2 Address Pointer */
#define ETH_DMARXDESC_B2AP 0xFFFFFFFFU /*!< Buffer2 Address Pointer */
/*---------------------------------------------------------------------------------------------------------------------
RDES4 | Reserved[31:15] | Extended Status [14:0] |
@ -827,47 +824,47 @@ TDES7 | Transmit Time Stamp High [31:0]
--------------------------------------------------------------------------------------------------------------------*/
/* Bit definition of RDES4 register */
#define ETH_DMAPTPRXDESC_PTPV ((uint32_t)0x00002000U) /* PTP Version */
#define ETH_DMAPTPRXDESC_PTPFT ((uint32_t)0x00001000U) /* PTP Frame Type */
#define ETH_DMAPTPRXDESC_PTPMT ((uint32_t)0x00000F00U) /* PTP Message Type */
#define ETH_DMAPTPRXDESC_PTPMT_SYNC ((uint32_t)0x00000100U) /* SYNC message
(all clock types) */
#define ETH_DMAPTPRXDESC_PTPMT_FOLLOWUP ((uint32_t)0x00000200U) /* FollowUp message
(all clock types) */
#define ETH_DMAPTPRXDESC_PTPMT_DELAYREQ ((uint32_t)0x00000300U) /* DelayReq message
(all clock types) */
#define ETH_DMAPTPRXDESC_PTPMT_DELAYRESP ((uint32_t)0x00000400U) /* DelayResp message
(all clock types) */
#define ETH_DMAPTPRXDESC_PTPMT_PDELAYREQ_ANNOUNCE ((uint32_t)0x00000500U) /* PdelayReq message
(peer-to-peer transparent clock)
or Announce message (Ordinary
or Boundary clock) */
#define ETH_DMAPTPRXDESC_PTPMT_PDELAYRESP_MANAG ((uint32_t)0x00000600U) /* PdelayResp message
(peer-to-peer transparent clock)
or Management message (Ordinary
or Boundary clock) */
#define ETH_DMAPTPRXDESC_PTPMT_PDELAYRESPFOLLOWUP_SIGNAL ((uint32_t)0x00000700U) /* PdelayRespFollowUp message
(peer-to-peer transparent clock)
or Signaling message (Ordinary
or Boundary clock) */
#define ETH_DMAPTPRXDESC_IPV6PR ((uint32_t)0x00000080U) /* IPv6 Packet Received */
#define ETH_DMAPTPRXDESC_IPV4PR ((uint32_t)0x00000040U) /* IPv4 Packet Received */
#define ETH_DMAPTPRXDESC_IPCB ((uint32_t)0x00000020U) /* IP Checksum Bypassed */
#define ETH_DMAPTPRXDESC_IPPE ((uint32_t)0x00000010U) /* IP Payload Error */
#define ETH_DMAPTPRXDESC_IPHE ((uint32_t)0x00000008U) /* IP Header Error */
#define ETH_DMAPTPRXDESC_IPPT ((uint32_t)0x00000007U) /* IP Payload Type */
#define ETH_DMAPTPRXDESC_IPPT_UDP ((uint32_t)0x00000001U) /* UDP payload encapsulated in
the IP datagram */
#define ETH_DMAPTPRXDESC_IPPT_TCP ((uint32_t)0x00000002U) /* TCP payload encapsulated in
the IP datagram */
#define ETH_DMAPTPRXDESC_IPPT_ICMP ((uint32_t)0x00000003U) /* ICMP payload encapsulated in
#define ETH_DMAPTPRXDESC_PTPV 0x00002000U /* PTP Version */
#define ETH_DMAPTPRXDESC_PTPFT 0x00001000U /* PTP Frame Type */
#define ETH_DMAPTPRXDESC_PTPMT 0x00000F00U /* PTP Message Type */
#define ETH_DMAPTPRXDESC_PTPMT_SYNC 0x00000100U /* SYNC message
(all clock types) */
#define ETH_DMAPTPRXDESC_PTPMT_FOLLOWUP 0x00000200U /* FollowUp message
(all clock types) */
#define ETH_DMAPTPRXDESC_PTPMT_DELAYREQ 0x00000300U /* DelayReq message
(all clock types) */
#define ETH_DMAPTPRXDESC_PTPMT_DELAYRESP 0x00000400U /* DelayResp message
(all clock types) */
#define ETH_DMAPTPRXDESC_PTPMT_PDELAYREQ_ANNOUNCE 0x00000500U /* PdelayReq message
(peer-to-peer transparent clock)
or Announce message (Ordinary
or Boundary clock) */
#define ETH_DMAPTPRXDESC_PTPMT_PDELAYRESP_MANAG 0x00000600U /* PdelayResp message
(peer-to-peer transparent clock)
or Management message (Ordinary
or Boundary clock) */
#define ETH_DMAPTPRXDESC_PTPMT_PDELAYRESPFOLLOWUP_SIGNAL 0x00000700U /* PdelayRespFollowUp message
(peer-to-peer transparent clock)
or Signaling message (Ordinary
or Boundary clock) */
#define ETH_DMAPTPRXDESC_IPV6PR 0x00000080U /* IPv6 Packet Received */
#define ETH_DMAPTPRXDESC_IPV4PR 0x00000040U /* IPv4 Packet Received */
#define ETH_DMAPTPRXDESC_IPCB 0x00000020U /* IP Checksum Bypassed */
#define ETH_DMAPTPRXDESC_IPPE 0x00000010U /* IP Payload Error */
#define ETH_DMAPTPRXDESC_IPHE 0x00000008U /* IP Header Error */
#define ETH_DMAPTPRXDESC_IPPT 0x00000007U /* IP Payload Type */
#define ETH_DMAPTPRXDESC_IPPT_UDP 0x00000001U /* UDP payload encapsulated in
the IP datagram */
#define ETH_DMAPTPRXDESC_IPPT_TCP 0x00000002U /* TCP payload encapsulated in
the IP datagram */
#define ETH_DMAPTPRXDESC_IPPT_ICMP 0x00000003U /* ICMP payload encapsulated in
the IP datagram */
/* Bit definition of RDES6 register */
#define ETH_DMAPTPRXDESC_RTSL ((uint32_t)0xFFFFFFFFU) /* Receive Time Stamp Low */
#define ETH_DMAPTPRXDESC_RTSL 0xFFFFFFFFU /* Receive Time Stamp Low */
/* Bit definition of RDES7 register */
#define ETH_DMAPTPRXDESC_RTSH ((uint32_t)0xFFFFFFFFU) /* Receive Time Stamp High */
#define ETH_DMAPTPRXDESC_RTSH 0xFFFFFFFFU /* Receive Time Stamp High */
/**
* @}
@ -876,13 +873,13 @@ TDES7 | Transmit Time Stamp High [31:0]
/** @defgroup ETH_Frame_settings ETH frame settings
* @{
*/
#define ETH_MAX_PACKET_SIZE ((uint32_t)1528U) /*!< ETH_HEADER + 2*VLAN_TAG + MAX_ETH_PAYLOAD + ETH_CRC */
#define ETH_HEADER ((uint32_t)14U) /*!< 6 byte Dest addr, 6 byte Src addr, 2 byte length/type */
#define ETH_CRC ((uint32_t)4U) /*!< Ethernet CRC */
#define ETH_VLAN_TAG ((uint32_t)4U) /*!< optional 802.1q VLAN Tag */
#define ETH_MIN_PAYLOAD ((uint32_t)46U) /*!< Minimum Ethernet payload size */
#define ETH_MAX_PAYLOAD ((uint32_t)1500U) /*!< Maximum Ethernet payload size */
#define ETH_JUMBO_FRAME_PAYLOAD ((uint32_t)9000U) /*!< Jumbo frame payload size */
#define ETH_MAX_PACKET_SIZE 1528U /*!< ETH_HEADER + 2*VLAN_TAG + MAX_ETH_PAYLOAD + ETH_CRC */
#define ETH_HEADER 14U /*!< 6 byte Dest addr, 6 byte Src addr, 2 byte length/type */
#define ETH_CRC 4U /*!< Ethernet CRC */
#define ETH_VLAN_TAG 4U /*!< optional 802.1q VLAN Tag */
#define ETH_MIN_PAYLOAD 46U /*!< Minimum Ethernet payload size */
#define ETH_MAX_PAYLOAD 1500U /*!< Maximum Ethernet payload size */
#define ETH_JUMBO_FRAME_PAYLOAD 9000U /*!< Jumbo frame payload size */
/**
* @}
*/
@ -890,14 +887,14 @@ TDES7 | Transmit Time Stamp High [31:0]
/** @defgroup ETH_Error_Code ETH Error Code
* @{
*/
#define HAL_ETH_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
#define HAL_ETH_ERROR_PARAM ((uint32_t)0x00000001U) /*!< Busy error */
#define HAL_ETH_ERROR_BUSY ((uint32_t)0x00000002U) /*!< Parameter error */
#define HAL_ETH_ERROR_TIMEOUT ((uint32_t)0x00000004U) /*!< Timeout error */
#define HAL_ETH_ERROR_DMA ((uint32_t)0x00000008U) /*!< DMA transfer error */
#define HAL_ETH_ERROR_MAC ((uint32_t)0x00000010U) /*!< MAC transfer error */
#define HAL_ETH_ERROR_NONE 0x00000000U /*!< No error */
#define HAL_ETH_ERROR_PARAM 0x00000001U /*!< Busy error */
#define HAL_ETH_ERROR_BUSY 0x00000002U /*!< Parameter error */
#define HAL_ETH_ERROR_TIMEOUT 0x00000004U /*!< Timeout error */
#define HAL_ETH_ERROR_DMA 0x00000008U /*!< DMA transfer error */
#define HAL_ETH_ERROR_MAC 0x00000010U /*!< MAC transfer error */
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
#define HAL_ETH_ERROR_INVALID_CALLBACK ((uint32_t)0x00000020U) /*!< Invalid Callback error */
#define HAL_ETH_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid Callback error */
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
/**
* @}
@ -906,12 +903,12 @@ TDES7 | Transmit Time Stamp High [31:0]
/** @defgroup ETH_Tx_Packet_Attributes ETH Tx Packet Attributes
* @{
*/
#define ETH_TX_PACKETS_FEATURES_CSUM ((uint32_t)0x00000001U)
#define ETH_TX_PACKETS_FEATURES_SAIC ((uint32_t)0x00000002U)
#define ETH_TX_PACKETS_FEATURES_VLANTAG ((uint32_t)0x00000004U)
#define ETH_TX_PACKETS_FEATURES_INNERVLANTAG ((uint32_t)0x00000008U)
#define ETH_TX_PACKETS_FEATURES_TSO ((uint32_t)0x00000010U)
#define ETH_TX_PACKETS_FEATURES_CRCPAD ((uint32_t)0x00000020U)
#define ETH_TX_PACKETS_FEATURES_CSUM 0x00000001U
#define ETH_TX_PACKETS_FEATURES_SAIC 0x00000002U
#define ETH_TX_PACKETS_FEATURES_VLANTAG 0x00000004U
#define ETH_TX_PACKETS_FEATURES_INNERVLANTAG 0x00000008U
#define ETH_TX_PACKETS_FEATURES_TSO 0x00000010U
#define ETH_TX_PACKETS_FEATURES_CRCPAD 0x00000020U
/**
* @}
*/
@ -930,7 +927,7 @@ TDES7 | Transmit Time Stamp High [31:0]
* @{
*/
#define ETH_CRC_PAD_DISABLE (uint32_t)(ETH_DMATXDESC_DP | ETH_DMATXDESC_DC)
#define ETH_CRC_PAD_INSERT ((uint32_t)0x00000000U)
#define ETH_CRC_PAD_INSERT 0x00000000U
#define ETH_CRC_INSERT ETH_DMATXDESC_DP
/**
* @}
@ -997,7 +994,7 @@ TDES7 | Transmit Time Stamp High [31:0]
* @{
*/
#define ETH_DMAARBITRATION_RX ETH_DMAMR_DA
#define ETH_DMAARBITRATION_RX1_TX1 ((uint32_t)0x00000000U)
#define ETH_DMAARBITRATION_RX1_TX1 0x00000000U
#define ETH_DMAARBITRATION_RX2_TX1 ETH_DMAMR_PR_2_1
#define ETH_DMAARBITRATION_RX3_TX1 ETH_DMAMR_PR_3_1
#define ETH_DMAARBITRATION_RX4_TX1 ETH_DMAMR_PR_4_1
@ -1006,7 +1003,7 @@ TDES7 | Transmit Time Stamp High [31:0]
#define ETH_DMAARBITRATION_RX7_TX1 ETH_DMAMR_PR_7_1
#define ETH_DMAARBITRATION_RX8_TX1 ETH_DMAMR_PR_8_1
#define ETH_DMAARBITRATION_TX (ETH_DMAMR_TXPR | ETH_DMAMR_DA)
#define ETH_DMAARBITRATION_TX1_RX1 ((uint32_t)0x00000000U)
#define ETH_DMAARBITRATION_TX1_RX1 0x00000000U
#define ETH_DMAARBITRATION_TX2_RX1 (ETH_DMAMR_TXPR | ETH_DMAMR_PR_2_1)
#define ETH_DMAARBITRATION_TX3_RX1 (ETH_DMAMR_TXPR | ETH_DMAMR_PR_3_1)
#define ETH_DMAARBITRATION_TX4_RX1 (ETH_DMAMR_TXPR | ETH_DMAMR_PR_4_1)
@ -1023,7 +1020,7 @@ TDES7 | Transmit Time Stamp High [31:0]
*/
#define ETH_BURSTLENGTH_FIXED ETH_DMABMR_FB
#define ETH_BURSTLENGTH_MIXED ETH_DMABMR_MB
#define ETH_BURSTLENGTH_UNSPECIFIED ((uint32_t)0x00000000U)
#define ETH_BURSTLENGTH_UNSPECIFIED 0x00000000U
/**
* @}
*/
@ -1089,12 +1086,12 @@ TDES7 | Transmit Time Stamp High [31:0]
/** @defgroup ETH_DMA_Status_Flags ETH DMA Status Flags
* @{
*/
#define ETH_DMA_RX_NO_ERROR_FLAG ((uint32_t)0x00000000U)
#define ETH_DMA_RX_NO_ERROR_FLAG 0x00000000U
#define ETH_DMA_RX_DESC_READ_ERROR_FLAG (ETH_DMACSR_REB_BIT_2 | ETH_DMACSR_REB_BIT_1 | ETH_DMACSR_REB_BIT_0)
#define ETH_DMA_RX_DESC_WRITE_ERROR_FLAG (ETH_DMACSR_REB_BIT_2 | ETH_DMACSR_REB_BIT_1)
#define ETH_DMA_RX_BUFFER_READ_ERROR_FLAG (ETH_DMACSR_REB_BIT_2 | ETH_DMACSR_REB_BIT_0)
#define ETH_DMA_RX_BUFFER_WRITE_ERROR_FLAG ETH_DMACSR_REB_BIT_2
#define ETH_DMA_TX_NO_ERROR_FLAG ((uint32_t)0x00000000U)
#define ETH_DMA_TX_NO_ERROR_FLAG 0x00000000U
#define ETH_DMA_TX_DESC_READ_ERROR_FLAG (ETH_DMACSR_TEB_BIT_2 | ETH_DMACSR_TEB_BIT_1 | ETH_DMACSR_TEB_BIT_0)
#define ETH_DMA_TX_DESC_WRITE_ERROR_FLAG (ETH_DMACSR_TEB_BIT_2 | ETH_DMACSR_TEB_BIT_1)
#define ETH_DMA_TX_BUFFER_READ_ERROR_FLAG (ETH_DMACSR_TEB_BIT_2 | ETH_DMACSR_TEB_BIT_0)
@ -1191,7 +1188,7 @@ TDES7 | Transmit Time Stamp High [31:0]
/** @defgroup ETH_Speed ETH Speed
* @{
*/
#define ETH_SPEED_10M ((uint32_t)0x00000000U)
#define ETH_SPEED_10M 0x00000000U
#define ETH_SPEED_100M 0x00004000U
/**
* @}
@ -1201,7 +1198,7 @@ TDES7 | Transmit Time Stamp High [31:0]
* @{
*/
#define ETH_FULLDUPLEX_MODE ETH_MACCR_DM
#define ETH_HALFDUPLEX_MODE ((uint32_t)0x00000000U)
#define ETH_HALFDUPLEX_MODE 0x00000000U
/**
* @}
*/
@ -1230,7 +1227,7 @@ TDES7 | Transmit Time Stamp High [31:0]
/** @defgroup ETH_Source_Addr_Control ETH Source Addr Control
* @{
*/
#define ETH_SOURCEADDRESS_DISABLE ((uint32_t)0x00000000U)
#define ETH_SOURCEADDRESS_DISABLE 0x00000000U
#define ETH_SOURCEADDRESS_INSERT_ADDR0 ETH_MACCR_SARC_INSADDR0
#define ETH_SOURCEADDRESS_INSERT_ADDR1 ETH_MACCR_SARC_INSADDR1
#define ETH_SOURCEADDRESS_REPLACE_ADDR0 ETH_MACCR_SARC_REPADDR0
@ -1262,10 +1259,10 @@ TDES7 | Transmit Time Stamp High [31:0]
/** @defgroup ETH_MAC_addresses ETH MAC addresses
* @{
*/
#define ETH_MAC_ADDRESS0 ((uint32_t)0x00000000U)
#define ETH_MAC_ADDRESS1 ((uint32_t)0x00000008U)
#define ETH_MAC_ADDRESS2 ((uint32_t)0x00000010U)
#define ETH_MAC_ADDRESS3 ((uint32_t)0x00000018U)
#define ETH_MAC_ADDRESS0 0x00000000U
#define ETH_MAC_ADDRESS1 0x00000008U
#define ETH_MAC_ADDRESS2 0x00000010U
#define ETH_MAC_ADDRESS3 0x00000018U
/**
* @}
*/
@ -1304,11 +1301,11 @@ TDES7 | Transmit Time Stamp High [31:0]
/** @defgroup HAL_ETH_StateTypeDef ETH States
* @{
*/
#define HAL_ETH_STATE_RESET ((uint32_t)0x00000000U) /*!< Peripheral not yet Initialized or disabled */
#define HAL_ETH_STATE_READY ((uint32_t)0x00000010U) /*!< Peripheral Communication started */
#define HAL_ETH_STATE_BUSY ((uint32_t)0x00000023U) /*!< an internal process is ongoing */
#define HAL_ETH_STATE_STARTED ((uint32_t)0x00000023U) /*!< an internal process is started */
#define HAL_ETH_STATE_ERROR ((uint32_t)0x000000E0U) /*!< Error State */
#define HAL_ETH_STATE_RESET 0x00000000U /*!< Peripheral not yet Initialized or disabled */
#define HAL_ETH_STATE_READY 0x00000010U /*!< Peripheral Communication started */
#define HAL_ETH_STATE_BUSY 0x00000023U /*!< an internal process is ongoing */
#define HAL_ETH_STATE_STARTED 0x00000023U /*!< an internal process is started */
#define HAL_ETH_STATE_ERROR 0x000000E0U /*!< Error State */
/**
* @}
*/
@ -1344,7 +1341,7 @@ TDES7 | Transmit Time Stamp High [31:0]
* @{
*/
#define ETH_MEDIA_INTERFACE_MII 0x00000000U
#define ETH_MEDIA_INTERFACE_RMII ((uint32_t)SYSCFG_PMC_MII_RMII_SEL)
#define ETH_MEDIA_INTERFACE_RMII (SYSCFG_PMC_MII_RMII_SEL)
/**
* @}
*/
@ -1805,8 +1802,8 @@ TDES7 | Transmit Time Stamp High [31:0]
/** @defgroup ETH_PTP_Config_Status ETH PTP Config Status
* @{
*/
#define HAL_ETH_PTP_NOT_CONFIGURATED ((uint32_t)0x00000000U) /*!< ETH PTP Configuration not done */
#define HAL_ETH_PTP_CONFIGURATED ((uint32_t)0x00000001U) /*!< ETH PTP Configuration done */
#define HAL_ETH_PTP_NOT_CONFIGURATED 0x00000000U /*!< ETH PTP Configuration not done */
#define HAL_ETH_PTP_CONFIGURATED 0x00000001U /*!< ETH PTP Configuration done */
/**
* @}
*/
@ -1928,7 +1925,7 @@ TDES7 | Transmit Time Stamp High [31:0]
( __INTERRUPT__)) == ( __INTERRUPT__))
/*!< External interrupt line 19 Connected to the ETH wakeup EXTI Line */
#define ETH_WAKEUP_EXTI_LINE ((uint32_t)0x00080000U)
#define ETH_WAKEUP_EXTI_LINE 0x00080000U
/**
* @brief Enable the ETH WAKEUP Exti Line.

16
Drivers/STM32F4xx_HAL_Driver/README.md
View File

@ -27,21 +27,7 @@ Details about the content of this release are available in the release note [her
## Compatibility information
In this table, you can find the successive versions of this HAL-LL Driver component, in line with the corresponding versions of the full MCU package:
It is **crucial** that you use a consistent set of versions for the CMSIS Core - CMSIS Device - HAL, as mentioned in this table.
HAL Driver F4 | CMSIS Device F4 | CMSIS Core | Was delivered in the full MCU package
------------- | --------------- | ---------- | -------------------------------------
Tag v1.7.6 | Tag v2.6.3 | Tag v5.4.0_cm4 | Tag v1.24.1 (and following, if any, till HAL tag)
Tag v1.7.7 | Tag v2.6.4 | Tag v5.4.0_cm4 | Tag v1.24.2 (and following, if any, till HAL tag)
Tag v1.7.8 | Tag v2.6.5 | Tag v5.4.0_cm4 | Tag v1.25.0 (and following, if any, till HAL tag)
Tag v1.7.9 | Tag v2.6.5 | Tag v5.4.0_cm4 | Tag v1.25.1 (and following, if any, till HAL tag)
Tag v1.7.10| Tag v2.6.5 | Tag v5.4.0_cm4 | Tag v1.25.2 (and following, if any, till HAL tag)
Tag v1.7.11| Tag v2.6.6 | Tag v5.4.0_cm4 | Tag v1.26.0 (and following, if any, till HAL tag)
Tag v1.7.12| Tag v2.6.6 | Tag v5.4.0_cm4 | Tag v1.26.1 (and following, if any, till HAL tag)
Tag v1.7.13| Tag v2.6.7 | Tag v5.4.0_cm4 | Tag v1.26.2 (and following, if any, till HAL tag)
Tag v1.8.0 | Tag v2.6.8 | Tag v5.4.0_cm4 | Tag v1.27.0 (and following, if any, till HAL tag)
It is **crucial** that you use a consistent set of versions for the CMSIS Core - CMSIS Device - HAL, as mentioned in [this](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/STM32CubeF4/blob/master/Release_Notes.html) release note.
The full **STM32CubeF4** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeF4).

86
Drivers/STM32F4xx_HAL_Driver/Release_Notes.html
View File

@ -6,7 +6,8 @@
<meta http-equiv="content-type" content="text/html;
charset=windows-1252"><title>Release Notes for STM32F4xx HAL Drivers</title></head><body lang="EN-US" link="blue" vlink="blue">
charset=windows-1252"><title>Release Notes for STM32F4xx HAL Drivers</title></head>
<body lang="EN-US" link="blue" vlink="blue">
<div class="WordSection1">
<div>
<p class="MsoNormal" style=""><span style="font-family: &quot;Arial&quot;,sans-serif;"><o:p>&nbsp;</o:p></span></p>
@ -46,11 +47,30 @@
<tbody>
<tr style="">
<td style="padding: 0in; width: 843.25pt;" valign="top" width="1124">
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial;"><font color="#ffffff"><a name="History"></a><span style="font-size: 12pt;">Update
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><font color="#ffffff"><a name="History"></a><span style="font-size: 12pt;">Update
History</span><span style=""><o:p></o:p></span></font></h2><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.8.0
History</span><span style=""><o:p></o:p></span></font></h2><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.8.1
/ 24-June-2022</span></font></h3>
<blockquote>
<p><b><u><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif; color: black;">Main
Changes<br>
</span></u></b></p>
</blockquote>
<ul style="orphans: 2; text-align: start; widows: 2; word-spacing: 0px;" type="disc"><li><font face="Verdana" size="-1">General updates to fix HAL ETH defects and implementation enhancements.</font></li><li><p><font face="Verdana" size="-1"><strong>HAL</strong>
updates</font></p>
<font face="Verdana" size="-1"> </font>
<ul><font face="Verdana" size="-1">
</font><li><font face="Verdana" size="-1"><strong>HAL ETH </strong>update</font></li><ul><li style="font-family: -apple-system,BlinkMacSystemFont,&quot;Segoe UI&quot;,Roboto,Ubuntu,&quot;Helvetica Neue&quot;,Helvetica,sans-serif; line-height: 1.4;">Remove useless assert_param(IS_ETH_MAC_ADDRESS0123(MacAddr)) from static function ETH_MACAddressConfig().</li><li style="font-family: -apple-system,BlinkMacSystemFont,&quot;Segoe UI&quot;,Roboto,Ubuntu,&quot;Helvetica Neue&quot;,Helvetica,sans-serif; line-height: 1.4;">Replace hard coded Rx buffer size (1000U) by macro ETH_RX_BUF_SIZE.</li><li style="font-family: -apple-system,BlinkMacSystemFont,&quot;Segoe UI&quot;,Roboto,Ubuntu,&quot;Helvetica Neue&quot;,Helvetica,sans-serif; line-height: 1.4;">Correct
bit positions when getting MAC and DMA configurations and replace
‘UnicastSlowProtocolPacketDetect’ by ‘UnicastPausePacketDetect’ in the
MAC default configuration structure.</li><li style="font-family: -apple-system,BlinkMacSystemFont,&quot;Segoe UI&quot;,Roboto,Ubuntu,&quot;Helvetica Neue&quot;,Helvetica,sans-serif; line-height: 1.4;">Ensure a delay of 4 TX_CLK/RX_CLK cycles between two successive write operations to the same register.</li><li style="font-family: -apple-system,BlinkMacSystemFont,&quot;Segoe UI&quot;,Roboto,Ubuntu,&quot;Helvetica Neue&quot;,Helvetica,sans-serif; line-height: 1.4;">Disable DMA transmission in both HAL_ETH_Stop_IT() and HAL_ETH_Stop() APIs.<br><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;"></span></font></li></ul></ul></li></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.8.0
/ 11-February-2022</span></font></h3>
<blockquote>
<p><b><u><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif; color: black;">Main
@ -260,7 +280,7 @@ all part-numbers (e.g., #if defined(RTC_TAFCR_TAMPPRCH)).</font></li>
</ul>
</li>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.13
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.13
/ 16-July-2021</span></font></h3>
<blockquote>
<p><b><u><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif; color: black;">Main
@ -467,7 +487,7 @@ all part-numbers (e.g., #if defined(RTC_TAFCR_TAMPPRCH)).</font></li>
in USB PCD control
endpoint receive ISR.</font><br><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;"></span></font></li></ul>
</li></ul>
</li></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.12
</li></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.12
/ 26-March-2021</span><span style=""><o:p></o:p></span></font></h3>
<p class="MsoNormal" style="margin: 4.5pt 0in 4.5pt 118.5pt; text-indent: -97.5pt;"><b><u><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif; color: black;">Main
@ -491,7 +511,7 @@ all part-numbers (e.g., #if defined(RTC_TAFCR_TAMPPRCH)).</font></li>
</ul>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.11
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.11
/ 12-February-2021</span><span style=""><o:p></o:p></span></font></h3>
<p class="MsoNormal" style="margin: 4.5pt 0in 4.5pt 118.5pt; text-indent: -97.5pt;"><b><u><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif; color: black;">Main
@ -1016,7 +1036,7 @@ all part-numbers (e.g., #if defined(RTC_TAFCR_TAMPPRCH)).</font></li>
</ul>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">V1.7.10
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">V1.7.10
@ -1050,7 +1070,7 @@ all part-numbers (e.g., #if defined(RTC_TAFCR_TAMPPRCH)).</font></li>
</ul>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.9
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.9
@ -1172,7 +1192,7 @@ all part-numbers (e.g., #if defined(RTC_TAFCR_TAMPPRCH)).</font></li>
mode.<o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.8
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.8
@ -1280,7 +1300,7 @@ all part-numbers (e.g., #if defined(RTC_TAFCR_TAMPPRCH)).</font></li>
</ul>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.7
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.7
@ -2435,7 +2455,7 @@ all part-numbers (e.g., #if defined(RTC_TAFCR_TAMPPRCH)).</font></li>
with reference manual</span><span style=""><o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.6
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.6
@ -2563,7 +2583,7 @@ all part-numbers (e.g., #if defined(RTC_TAFCR_TAMPPRCH)).</font></li>
interrupt handlers<o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.5
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.5
@ -3277,7 +3297,7 @@ all part-numbers (e.g., #if defined(RTC_TAFCR_TAMPPRCH)).</font></li>
instance defined in CMSIS <span class="grame"><span style="font-family: &quot;Verdana&quot;,sans-serif;">device</span></span></span><span style=""><o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.4
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.4
@ -3339,7 +3359,7 @@ all part-numbers (e.g., #if defined(RTC_TAFCR_TAMPPRCH)).</font></li>
audio issue</span><span style=""><o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.3
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.3
@ -3610,7 +3630,7 @@ and&nbsp;HAL_CAN_TxMailbox2CompleteCallback().</span><span style=""><o:p></o:p><
/ <span class="spelle"><span style="font-family: &quot;Verdana&quot;,sans-serif;">FSMC_PCCARD_Init</span></span>()</span><span style=""><o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.2
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.2
@ -3995,7 +4015,7 @@ and&nbsp;HAL_CAN_TxMailbox2CompleteCallback().</span><span style=""><o:p></o:p><
<span class="grame"><span style="font-family: &quot;Verdana&quot;,sans-serif;">used</span></span></span><span style=""><o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.1
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.1
@ -4079,7 +4099,7 @@ and&nbsp;HAL_CAN_TxMailbox2CompleteCallback().</span><span style=""><o:p></o:p><
</ul>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.0
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.7.0
@ -4578,7 +4598,7 @@ and&nbsp;HAL_CAN_TxMailbox2CompleteCallback().</span><span style=""><o:p></o:p><
functions</span><span style=""><o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.6.0
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.6.0
@ -4814,7 +4834,7 @@ and&nbsp;HAL_CAN_TxMailbox2CompleteCallback().</span><span style=""><o:p></o:p><
<span class="grame"><span style="font-family: &quot;Verdana&quot;,sans-serif;">callbacks</span></span></span></span><span style=""><o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.5.2
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.5.2
@ -4913,7 +4933,7 @@ and&nbsp;HAL_CAN_TxMailbox2CompleteCallback().</span><span style=""><o:p></o:p><
optimization &nbsp;</span><o:p></o:p></span></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.5.1
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.5.1
@ -5005,7 +5025,7 @@ and&nbsp;HAL_CAN_TxMailbox2CompleteCallback().</span><span style=""><o:p></o:p><
concurrent <span class="grame">way</span></span></span><o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.5.0
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.5.0
@ -6211,7 +6231,7 @@ and&nbsp;HAL_CAN_TxMailbox2CompleteCallback().</span><span style=""><o:p></o:p><
the changes: <span class="spelle"><span style="font-family: &quot;Verdana&quot;,sans-serif;">WWDG_</span></span><span class="grame"><span style="font-family: &quot;Verdana&quot;,sans-serif;">Example</span></span></span><span style=""><o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.4.4
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.4.4
@ -6957,7 +6977,7 @@ and&nbsp;HAL_CAN_TxMailbox2CompleteCallback().</span><span style=""><o:p></o:p><
<p class="MsoNormal" style=""><span style="font-size: 10pt;"><br style="">
<!--[if !supportLineBreakNewLine]--><br style="">
<!--[endif]--><o:p></o:p></span></p>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.4.4
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.4.4
/ 11-December-2015</span><span style=""><o:p></o:p></span></font></h3>
<p class="MsoNormal" style=""><b><u><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif; color: black;">Main Changes</span></u></b><span style="font-size: 10pt;"><o:p></o:p></span></p>
<ul style="margin-top: 0in;" type="square">
@ -6995,7 +7015,7 @@ and&nbsp;HAL_CAN_TxMailbox2CompleteCallback().</span><span style=""><o:p></o:p><
Software reset management</span><span style=""><o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.4.2
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.4.2
@ -7227,7 +7247,7 @@ and&nbsp;HAL_CAN_TxMailbox2CompleteCallback().</span><span style=""><o:p></o:p><
parameters</span><span style=""><o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.4.1
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.4.1
@ -7317,7 +7337,7 @@ and&nbsp;HAL_CAN_TxMailbox2CompleteCallback().</span><span style=""><o:p></o:p><
calculated <span class="grame"><span style="font-family: &quot;Verdana&quot;,sans-serif;">correctly”</span></span></span><span style=""><o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.4.0
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.4.0
@ -7547,7 +7567,7 @@ and&nbsp;HAL_CAN_TxMailbox2CompleteCallback().</span><span style=""><o:p></o:p><
devices</span><span style=""><o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.3.2
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.3.2
@ -7875,7 +7895,7 @@ and&nbsp;HAL_CAN_TxMailbox2CompleteCallback().</span><span style=""><o:p></o:p><
Host channel re-<span class="grame"><span style="font-family: &quot;Verdana&quot;,sans-serif;">activation</span></span></span><span style=""><o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.3.1
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.3.1
@ -7945,7 +7965,7 @@ and&nbsp;HAL_CAN_TxMailbox2CompleteCallback().</span><span style=""><o:p></o:p><
software trigger <span class="grame"><span style="font-family: &quot;Verdana&quot;,sans-serif;">configuration</span></span></span><span style=""><o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.3.0
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.3.0
@ -8846,7 +8866,7 @@ HAL_I2S_DMAPause(),&nbsp;HAL_I2S_DMAStop(),&nbsp;HAL_I2S_DMAResume(),&nbsp;HAL_I
Sensing B activation</span><span style=""><o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.2.0
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.2.0
@ -10476,7 +10496,7 @@ UART_WAKEUPMETHOD_ADDRESSMARK</span><span style=""><o:p></o:p></span></li>
</ul>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.1.0
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.1.0
@ -11393,7 +11413,7 @@ __USB_OTG_FS_CLK_SLEEP_ENABLE()<o:p></o:p></span></i></li>
Wake</span><span style=""><o:p></o:p></span></li>
</ul>
</ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.0.0
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt;"><font color="#ffffff"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,sans-serif;">V1.0.0
@ -11418,7 +11438,7 @@ __USB_OTG_FS_CLK_SLEEP_ENABLE()<o:p></o:p></span></i></li>
</tr>
<tr style="">
<td style="padding: 0in; width: 843.25pt;" valign="top" width="1124">
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial;"><span style="font-size: 12pt;"><o:p>&nbsp;</o:p></span></h2>
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt;"><o:p>&nbsp;</o:p></span></h2>
</td>
</tr>
</tbody>

4
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c
View File

@ -50,11 +50,11 @@
* @{
*/
/**
* @brief STM32F4xx HAL Driver version number V1.8.0
* @brief STM32F4xx HAL Driver version number V1.8.1
*/
#define __STM32F4xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
#define __STM32F4xx_HAL_VERSION_SUB1 (0x08U) /*!< [23:16] sub1 version */
#define __STM32F4xx_HAL_VERSION_SUB2 (0x00U) /*!< [15:8] sub2 version */
#define __STM32F4xx_HAL_VERSION_SUB2 (0x01U) /*!< [15:8] sub2 version */
#define __STM32F4xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
#define __STM32F4xx_HAL_VERSION ((__STM32F4xx_HAL_VERSION_MAIN << 24U)\
|(__STM32F4xx_HAL_VERSION_SUB1 << 16U)\

198
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.c
View File

@ -194,44 +194,44 @@
/** @addtogroup ETH_Private_Constants ETH Private Constants
* @{
*/
#define ETH_MACCR_MASK ((uint32_t)0xFFFB7F7CU)
#define ETH_MACECR_MASK ((uint32_t)0x3F077FFFU)
#define ETH_MACFFR_MASK ((uint32_t)0x800007FFU)
#define ETH_MACWTR_MASK ((uint32_t)0x0000010FU)
#define ETH_MACTFCR_MASK ((uint32_t)0xFFFF00F2U)
#define ETH_MACRFCR_MASK ((uint32_t)0x00000003U)
#define ETH_MTLTQOMR_MASK ((uint32_t)0x00000072U)
#define ETH_MTLRQOMR_MASK ((uint32_t)0x0000007BU)
#define ETH_DMAMR_MASK ((uint32_t)0x00007802U)
#define ETH_DMASBMR_MASK ((uint32_t)0x0000D001U)
#define ETH_DMACCR_MASK ((uint32_t)0x00013FFFU)
#define ETH_DMACTCR_MASK ((uint32_t)0x003F1010U)
#define ETH_DMACRCR_MASK ((uint32_t)0x803F0000U)
#define ETH_MACPMTCSR_MASK (ETH_MACPMTCSR_PD | ETH_MACPMTCSR_WFE | \
ETH_MACPMTCSR_MPE | ETH_MACPMTCSR_GU)
#define ETH_MACCR_MASK 0xFFFB7F7CU
#define ETH_MACECR_MASK 0x3F077FFFU
#define ETH_MACFFR_MASK 0x800007FFU
#define ETH_MACWTR_MASK 0x0000010FU
#define ETH_MACTFCR_MASK 0xFFFF00F2U
#define ETH_MACRFCR_MASK 0x00000003U
#define ETH_MTLTQOMR_MASK 0x00000072U
#define ETH_MTLRQOMR_MASK 0x0000007BU
#define ETH_DMAMR_MASK 0x00007802U
#define ETH_DMASBMR_MASK 0x0000D001U
#define ETH_DMACCR_MASK 0x00013FFFU
#define ETH_DMACTCR_MASK 0x003F1010U
#define ETH_DMACRCR_MASK 0x803F0000U
#define ETH_MACPMTCSR_MASK (ETH_MACPMTCSR_PD | ETH_MACPMTCSR_WFE | \
ETH_MACPMTCSR_MPE | ETH_MACPMTCSR_GU)
/* Timeout values */
#define ETH_SWRESET_TIMEOUT ((uint32_t)500U)
#define ETH_MDIO_BUS_TIMEOUT ((uint32_t)1000U)
#define ETH_SWRESET_TIMEOUT 500U
#define ETH_MDIO_BUS_TIMEOUT 1000U
#define ETH_DMARXDESC_ERRORS_MASK ((uint32_t)(ETH_DMARXDESC_DBE | ETH_DMARXDESC_RE | \
ETH_DMARXDESC_OE | ETH_DMARXDESC_RWT |\
ETH_DMARXDESC_LC | ETH_DMARXDESC_CE |\
ETH_DMARXDESC_DE | ETH_DMARXDESC_IPV4HCE))
#define ETH_MAC_US_TICK ((uint32_t)1000000U)
#define ETH_MAC_US_TICK 1000000U
#define ETH_MACTSCR_MASK ((uint32_t)0x0087FF2FU)
#define ETH_MACTSCR_MASK 0x0087FF2FU
#define ETH_PTPTSHR_VALUE ((uint32_t)0xFFFFFFFFU)
#define ETH_PTPTSLR_VALUE ((uint32_t)0xBB9ACA00U)
#define ETH_PTPTSHR_VALUE 0xFFFFFFFFU
#define ETH_PTPTSLR_VALUE 0xBB9ACA00U
/* Ethernet MACMIIAR register Mask */
#define ETH_MACMIIAR_CR_MASK ((uint32_t)0xFFFFFFE3U)
#define ETH_MACMIIAR_CR_MASK 0xFFFFFFE3U
/* Delay to wait when writing to some Ethernet registers */
#define ETH_REG_WRITE_DELAY ((uint32_t)0x00000001U)
#define ETH_REG_WRITE_DELAY 0x00000001U
/* ETHERNET MACCR register Mask */
#define ETH_MACCR_CLEAR_MASK 0xFF20810FU
@ -243,8 +243,8 @@
#define ETH_DMAOMR_CLEAR_MASK 0xF8DE3F23U
/* ETHERNET MAC address offsets */
#define ETH_MAC_ADDR_HBASE (uint32_t)(ETH_MAC_BASE + 0x40U) /* ETHERNET MAC address high offset */
#define ETH_MAC_ADDR_LBASE (uint32_t)(ETH_MAC_BASE + 0x44U) /* ETHERNET MAC address low offset */
#define ETH_MAC_ADDR_HBASE (uint32_t)(ETH_MAC_BASE + 0x40U) /* ETHERNET MAC address high offset */
#define ETH_MAC_ADDR_LBASE (uint32_t)(ETH_MAC_BASE + 0x44U) /* ETHERNET MAC address low offset */
/* ETHERNET DMA Rx descriptors Frame length Shift */
#define ETH_DMARXDESC_FRAMELENGTHSHIFT 16U
@ -696,6 +696,8 @@ HAL_StatusTypeDef HAL_ETH_UnRegisterCallback(ETH_HandleTypeDef *heth, HAL_ETH_Ca
*/
HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth)
{
uint32_t tmpreg1;
if (heth->gState == HAL_ETH_STATE_READY)
{
heth->gState = HAL_ETH_STATE_BUSY;
@ -709,9 +711,21 @@ HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth)
/* Enable the MAC transmission */
SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
/* Wait until the write operation will be taken into account :
at least four TX_CLK/RX_CLK clock cycles */
tmpreg1 = (heth->Instance)->MACCR;
HAL_Delay(ETH_REG_WRITE_DELAY);
(heth->Instance)->MACCR = tmpreg1;
/* Enable the MAC reception */
SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
/* Wait until the write operation will be taken into account :
at least four TX_CLK/RX_CLK clock cycles */
tmpreg1 = (heth->Instance)->MACCR;
HAL_Delay(ETH_REG_WRITE_DELAY);
(heth->Instance)->MACCR = tmpreg1;
/* Flush Transmit FIFO */
ETH_FlushTransmitFIFO(heth);
@ -739,6 +753,8 @@ HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth)
*/
HAL_StatusTypeDef HAL_ETH_Start_IT(ETH_HandleTypeDef *heth)
{
uint32_t tmpreg1;
if (heth->gState == HAL_ETH_STATE_READY)
{
heth->gState = HAL_ETH_STATE_BUSY;
@ -765,9 +781,21 @@ HAL_StatusTypeDef HAL_ETH_Start_IT(ETH_HandleTypeDef *heth)
/* Enable the MAC transmission */
SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
/* Wait until the write operation will be taken into account :
at least four TX_CLK/RX_CLK clock cycles */
tmpreg1 = (heth->Instance)->MACCR;
HAL_Delay(ETH_REG_WRITE_DELAY);
(heth->Instance)->MACCR = tmpreg1;
/* Enable the MAC reception */
SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
/* Wait until the write operation will be taken into account :
at least four TX_CLK/RX_CLK clock cycles */
tmpreg1 = (heth->Instance)->MACCR;
HAL_Delay(ETH_REG_WRITE_DELAY);
(heth->Instance)->MACCR = tmpreg1;
/* Flush Transmit FIFO */
ETH_FlushTransmitFIFO(heth);
@ -802,12 +830,14 @@ HAL_StatusTypeDef HAL_ETH_Start_IT(ETH_HandleTypeDef *heth)
*/
HAL_StatusTypeDef HAL_ETH_Stop(ETH_HandleTypeDef *heth)
{
uint32_t tmpreg1;
if (heth->gState == HAL_ETH_STATE_STARTED)
{
/* Set the ETH peripheral state to BUSY */
heth->gState = HAL_ETH_STATE_BUSY;
/* Disable the DMA transmission */
CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
CLEAR_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_ST);
/* Disable the DMA reception */
CLEAR_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_SR);
@ -815,12 +845,24 @@ HAL_StatusTypeDef HAL_ETH_Stop(ETH_HandleTypeDef *heth)
/* Disable the MAC reception */
CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
/* Wait until the write operation will be taken into account :
at least four TX_CLK/RX_CLK clock cycles */
tmpreg1 = (heth->Instance)->MACCR;
HAL_Delay(ETH_REG_WRITE_DELAY);
(heth->Instance)->MACCR = tmpreg1;
/* Flush Transmit FIFO */
ETH_FlushTransmitFIFO(heth);
/* Disable the MAC transmission */
CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
/* Wait until the write operation will be taken into account :
at least four TX_CLK/RX_CLK clock cycles */
tmpreg1 = (heth->Instance)->MACCR;
HAL_Delay(ETH_REG_WRITE_DELAY);
(heth->Instance)->MACCR = tmpreg1;
heth->gState = HAL_ETH_STATE_READY;
/* Return function status */
@ -842,6 +884,7 @@ HAL_StatusTypeDef HAL_ETH_Stop_IT(ETH_HandleTypeDef *heth)
{
ETH_DMADescTypeDef *dmarxdesc;
uint32_t descindex;
uint32_t tmpreg1;
if (heth->gState == HAL_ETH_STATE_STARTED)
{
@ -852,19 +895,32 @@ HAL_StatusTypeDef HAL_ETH_Stop_IT(ETH_HandleTypeDef *heth)
ETH_DMAIER_FBEIE | ETH_DMAIER_AISE | ETH_DMAIER_RBUIE));
/* Disable the DMA transmission */
CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
CLEAR_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_ST);
/* Disable the DMA reception */
CLEAR_BIT(heth->Instance->DMAOMR, ETH_DMAOMR_SR);
/* Disable the MAC reception */
CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
/* Wait until the write operation will be taken into account :
at least four TX_CLK/RX_CLK clock cycles */
tmpreg1 = (heth->Instance)->MACCR;
HAL_Delay(ETH_REG_WRITE_DELAY);
(heth->Instance)->MACCR = tmpreg1;
/* Flush Transmit FIFO */
ETH_FlushTransmitFIFO(heth);
/* Disable the MAC transmission */
CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
/* Wait until the write operation will be taken into account :
at least four TX_CLK/RX_CLK clock cycles */
tmpreg1 = (heth->Instance)->MACCR;
HAL_Delay(ETH_REG_WRITE_DELAY);
(heth->Instance)->MACCR = tmpreg1;
/* Clear IOC bit to all Rx descriptors */
for (descindex = 0; descindex < (uint32_t)ETH_RX_DESC_CNT; descindex++)
{
@ -1173,20 +1229,23 @@ static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth)
if (allocStatus != 0U)
{
/* Ensure rest of descriptor is written to RAM before the OWN bit */
__DMB();
WRITE_REG(dmarxdesc->DESC0, ETH_DMARXDESC_OWN);
if (heth->RxDescList.ItMode == 0U)
{
WRITE_REG(dmarxdesc->DESC1, ETH_DMARXDESC_DIC | 1000U | ETH_DMARXDESC_RCH);
WRITE_REG(dmarxdesc->DESC1, ETH_DMARXDESC_DIC | ETH_RX_BUF_SIZE | ETH_DMARXDESC_RCH);
}
else
{
WRITE_REG(dmarxdesc->DESC1, 1000U | ETH_DMARXDESC_RCH);
WRITE_REG(dmarxdesc->DESC1, ETH_RX_BUF_SIZE | ETH_DMARXDESC_RCH);
}
/* Before transferring the ownership to DMA, make sure that the RX descriptors bits writing
is fully performed.
The __DMB() instruction is added to avoid any potential compiler optimization that
may lead to abnormal behavior. */
__DMB();
SET_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_OWN);
/* Increment current rx descriptor index */
INCR_RX_DESC_INDEX(descidx, 1U);
/* Get current descriptor address */
@ -2146,15 +2205,15 @@ HAL_StatusTypeDef HAL_ETH_GetMACConfig(ETH_HandleTypeDef *heth, ETH_MACConfigTyp
macconf->Watchdog = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_WD) >> 23) == 0U) ? ENABLE : DISABLE;
macconf->AutomaticPadCRCStrip = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_APCS) >> 7) > 0U) ? ENABLE : DISABLE;
macconf->InterPacketGapVal = READ_BIT(heth->Instance->MACCR, ETH_MACCR_IFG);
macconf->ChecksumOffload = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPCO) >> 27) > 0U) ? ENABLE : DISABLE;
macconf->ChecksumOffload = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPCO) >> 10U) > 0U) ? ENABLE : DISABLE;
macconf->TransmitFlowControl = ((READ_BIT(heth->Instance->MACFCR, ETH_MACFCR_TFCE) >> 1) > 0U) ? ENABLE : DISABLE;
macconf->ZeroQuantaPause = ((READ_BIT(heth->Instance->MACFCR, ETH_MACFCR_ZQPD) >> 7) == 0U) ? ENABLE : DISABLE;
macconf->PauseLowThreshold = READ_BIT(heth->Instance->MACFCR, ETH_MACFCR_PLT);
macconf->PauseTime = (READ_BIT(heth->Instance->MACFCR, ETH_MACFCR_PT) >> 16);
macconf->ReceiveFlowControl = (READ_BIT(heth->Instance->MACFCR, ETH_MACFCR_RFCE) > 0U) ? ENABLE : DISABLE;
macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACFCR, ETH_MACFCR_UPFD) >> 1) > 0U)
macconf->ReceiveFlowControl = ((READ_BIT(heth->Instance->MACFCR, ETH_MACFCR_RFCE) >> 2U) > 0U) ? ENABLE : DISABLE;
macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACFCR, ETH_MACFCR_UPFD) >> 3U) > 0U)
? ENABLE : DISABLE;
return HAL_OK;
@ -2175,8 +2234,9 @@ HAL_StatusTypeDef HAL_ETH_GetDMAConfig(ETH_HandleTypeDef *heth, ETH_DMAConfigTyp
return HAL_ERROR;
}
dmaconf->DMAArbitration = READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_DSL) >> 2;
dmaconf->AddressAlignedBeats = ((READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_AAB) >> 12) > 0U) ? ENABLE : DISABLE;
dmaconf->DMAArbitration = READ_BIT(heth->Instance->DMABMR,
(ETH_DMAARBITRATION_RXPRIORTX | ETH_DMAARBITRATION_ROUNDROBIN_RXTX_4_1));
dmaconf->AddressAlignedBeats = ((READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_AAB) >> 25U) > 0U) ? ENABLE : DISABLE;
dmaconf->BurstMode = READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_FB | ETH_DMABMR_MB);
dmaconf->RxDMABurstLength = READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_RDP);
dmaconf->TxDMABurstLength = READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_PBL);
@ -2312,6 +2372,7 @@ void HAL_ETH_SetMDIOClockRange(ETH_HandleTypeDef *heth)
HAL_StatusTypeDef HAL_ETH_SetMACFilterConfig(ETH_HandleTypeDef *heth, ETH_MACFilterConfigTypeDef *pFilterConfig)
{
uint32_t filterconfig;
uint32_t tmpreg1;
if (pFilterConfig == NULL)
{
@ -2332,6 +2393,12 @@ HAL_StatusTypeDef HAL_ETH_SetMACFilterConfig(ETH_HandleTypeDef *heth, ETH_MACFil
MODIFY_REG(heth->Instance->MACFFR, ETH_MACFFR_MASK, filterconfig);
/* Wait until the write operation will be taken into account :
at least four TX_CLK/RX_CLK clock cycles */
tmpreg1 = (heth->Instance)->MACFFR;
HAL_Delay(ETH_REG_WRITE_DELAY);
(heth->Instance)->MACFFR = tmpreg1;
return HAL_OK;
}
@ -2417,14 +2484,28 @@ HAL_StatusTypeDef HAL_ETH_SetSourceMACAddrMatch(ETH_HandleTypeDef *heth, uint32_
*/
HAL_StatusTypeDef HAL_ETH_SetHashTable(ETH_HandleTypeDef *heth, uint32_t *pHashTable)
{
uint32_t tmpreg1;
if (pHashTable == NULL)
{
return HAL_ERROR;
}
heth->Instance->MACHTHR = pHashTable[0];
/* Wait until the write operation will be taken into account :
at least four TX_CLK/RX_CLK clock cycles */
tmpreg1 = (heth->Instance)->MACHTHR;
HAL_Delay(ETH_REG_WRITE_DELAY);
(heth->Instance)->MACHTHR = tmpreg1;
heth->Instance->MACHTLR = pHashTable[1];
/* Wait until the write operation will be taken into account :
at least four TX_CLK/RX_CLK clock cycles */
tmpreg1 = (heth->Instance)->MACHTLR;
HAL_Delay(ETH_REG_WRITE_DELAY);
(heth->Instance)->MACHTLR = tmpreg1;
return HAL_OK;
}
@ -2439,6 +2520,7 @@ HAL_StatusTypeDef HAL_ETH_SetHashTable(ETH_HandleTypeDef *heth, uint32_t *pHashT
*/
void HAL_ETH_SetRxVLANIdentifier(ETH_HandleTypeDef *heth, uint32_t ComparisonBits, uint32_t VLANIdentifier)
{
uint32_t tmpreg1;
MODIFY_REG(heth->Instance->MACVLANTR, ETH_MACVLANTR_VLANTI, VLANIdentifier);
if (ComparisonBits == ETH_VLANTAGCOMPARISON_16BIT)
{
@ -2448,6 +2530,12 @@ void HAL_ETH_SetRxVLANIdentifier(ETH_HandleTypeDef *heth, uint32_t ComparisonBit
{
SET_BIT(heth->Instance->MACVLANTR, ETH_MACVLANTR_VLANTC);
}
/* Wait until the write operation will be taken into account :
at least four TX_CLK/RX_CLK clock cycles */
tmpreg1 = (heth->Instance)->MACVLANTR;
HAL_Delay(ETH_REG_WRITE_DELAY);
(heth->Instance)->MACVLANTR = tmpreg1;
}
/**
@ -2478,13 +2566,27 @@ void HAL_ETH_EnterPowerDownMode(ETH_HandleTypeDef *heth, ETH_PowerDownConfigType
*/
void HAL_ETH_ExitPowerDownMode(ETH_HandleTypeDef *heth)
{
uint32_t tmpreg1;
/* clear wake up sources */
CLEAR_BIT(heth->Instance->MACPMTCSR, ETH_MACPMTCSR_WFE | ETH_MACPMTCSR_MPE | ETH_MACPMTCSR_GU);
/* Wait until the write operation will be taken into account :
at least four TX_CLK/RX_CLK clock cycles */
tmpreg1 = (heth->Instance)->MACPMTCSR;
HAL_Delay(ETH_REG_WRITE_DELAY);
(heth->Instance)->MACPMTCSR = tmpreg1;
if (READ_BIT(heth->Instance->MACPMTCSR, ETH_MACPMTCSR_PD) != 0U)
{
/* Exit power down mode */
CLEAR_BIT(heth->Instance->MACPMTCSR, ETH_MACPMTCSR_PD);
/* Wait until the write operation will be taken into account :
at least four TX_CLK/RX_CLK clock cycles */
tmpreg1 = (heth->Instance)->MACPMTCSR;
HAL_Delay(ETH_REG_WRITE_DELAY);
(heth->Instance)->MACPMTCSR = tmpreg1;
}
/* Disable PMT interrupt */
@ -2670,11 +2772,11 @@ static void ETH_SetMACConfig(ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *mac
tmpreg1 &= ETH_MACFCR_CLEAR_MASK;
tmpreg1 |= (uint32_t)((macconf->PauseTime << 16U) |
(uint32_t)macconf->ZeroQuantaPause |
((uint32_t)((macconf->ZeroQuantaPause == DISABLE) ? 1U : 0U) << 7U) |
macconf->PauseLowThreshold |
(uint32_t)macconf->UnicastSlowProtocolPacketDetect |
(uint32_t)macconf->ReceiveFlowControl |
(uint32_t)macconf->TransmitFlowControl);
((uint32_t)((macconf->UnicastPausePacketDetect == ENABLE) ? 1U : 0U) << 3U) |
((uint32_t)((macconf->ReceiveFlowControl == ENABLE) ? 1U : 0U) << 2U) |
((uint32_t)((macconf->TransmitFlowControl == ENABLE) ? 1U : 0U) << 1U));
/* Write to ETHERNET MACFCR */
(heth->Instance)->MACFCR = (uint32_t)tmpreg1;
@ -2764,7 +2866,7 @@ static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth)
macDefaultConf.TransmitFlowControl = DISABLE;
macDefaultConf.Speed = ETH_SPEED_100M;
macDefaultConf.DuplexMode = ETH_FULLDUPLEX_MODE;
macDefaultConf.UnicastSlowProtocolPacketDetect = DISABLE;
macDefaultConf.UnicastPausePacketDetect = DISABLE;
/* MAC default configuration */
ETH_SetMACConfig(heth, &macDefaultConf);
@ -3091,6 +3193,12 @@ static void ETH_InitCallbacksToDefault(ETH_HandleTypeDef *heth)
heth->ErrorCallback = HAL_ETH_ErrorCallback; /* Legacy weak ErrorCallback */
heth->PMTCallback = HAL_ETH_PMTCallback; /* Legacy weak PMTCallback */
heth->WakeUpCallback = HAL_ETH_WakeUpCallback; /* Legacy weak WakeUpCallback */
heth->rxLinkCallback = HAL_ETH_RxLinkCallback; /* Legacy weak RxLinkCallback */
heth->txFreeCallback = HAL_ETH_TxFreeCallback; /* Legacy weak TxFreeCallback */
#ifdef HAL_ETH_USE_PTP
heth->txPtpCallback = HAL_ETH_TxPtpCallback; /* Legacy weak TxPtpCallback */
#endif /* HAL_ETH_USE_PTP */
heth->rxAllocateCallback = HAL_ETH_RxAllocateCallback; /* Legacy weak RxAllocateCallback */
}
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */

240
Release_Notes.html
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@ -11,7 +11,7 @@
span.underline{text-decoration: underline;}
div.column{display: inline-block; vertical-align: top; width: 50%;}
</style>
<link rel="stylesheet" href="_htmresc/mini-st_2020.css" />
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<script src="//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js"></script>
<![endif]-->
@ -60,11 +60,49 @@
<div class="col-sm-12 col-lg-8">
<h1 id="update-history">Update History</h1>
<div class="collapse">
<input type="checkbox" id="collapse-section27" checked aria-hidden="true"> <label for="collapse-section27" aria-hidden="true"><strong>V1.27.0 / 11-February-2022</strong></label>
<input type="checkbox" id="collapse-section27_1" checked aria-hidden="true"> <label for="collapse-section27_1" aria-hidden="true"><strong>V1.27.1 / 24-June-2021</strong></label>
<div>
<h1 id="maintenance-release">Maintenance release</h1>
<h2 id="main-changes">Main Changes</h2>
<ul>
<li><p>Patch release of STM32CubeF4 Firmware Package.</p></li>
<li><strong>HAL</strong>
<ul>
<li><strong>ETH_HAL</strong>
<ul>
<li>Remove useless assert_param(IS_ETH_MAC_ADDRESS0123(MacAddr)) from static function ETH_MACAddressConfig().</li>
<li>Replace hard coded Rx buffer size (1000U) by macro ETH_RX_BUF_SIZE.</li>
<li>Correct bit positions when getting MAC and DMA configurations and replace ‘UnicastSlowProtocolPacketDetect’ by ‘UnicastPausePacketDetect’ in the MAC default configuration structure.</li>
<li>Ensure a delay of 4 TX_CLK/RX_CLK cycles between two successive write operations to the same register.</li>
<li>Disable DMA transmission in both HAL_ETH_Stop_IT() and HAL_ETH_Stop() APIs.</li>
</ul></li>
</ul></li>
</ul>
<h2 id="contents">Contents</h2>
<table>
<thead>
<tr class="header">
<th style="text-align: left;">Name</th>
<th style="text-align: left;">Version</th>
<th style="text-align: center;">Release note</th>
</tr>
</thead>
<tbody>
<tr class="odd">
<td style="text-align: left;"><strong>STM32F4xx HAL</strong></td>
<td style="text-align: left;"><strong>V1.8.1</strong></td>
<td style="text-align: center;"><a href="Drivers/STM32F4xx_HAL_Driver/Release_Notes.html">release notes</a></td>
</tr>
</tbody>
</table>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section27" aria-hidden="true"> <label for="collapse-section27" aria-hidden="true"><strong>V1.27.0 / 11-February-2022</strong></label>
<div>
<h1 id="maintenance-release-1">Maintenance release</h1>
<h2 id="main-changes-1">Main Changes</h2>
<ul>
<li>General updates to fix known defects and implementation enhancements.</li>
<li>All source files: update disclaimer to add reference to the new license agreement.</li>
<li><strong>The following changes done on the HAL drivers require an update of the application code based on older HAL versions</strong>
@ -267,7 +305,7 @@
</ul></li>
<li><p>For the complete list of changes, please refer to the release notes of each firmware component</p></li>
</ul>
<h2 id="contents">Contents</h2>
<h2 id="contents-1">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -677,8 +715,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section26_2" aria-hidden="true"> <label for="collapse-section26_2" checked aria-hidden="true"><strong>V1.26.2 / 16-July-2021</strong></label>
<div>
<h1 id="maintenance-release-1">Maintenance release</h1>
<h2 id="main-changes-1">Main Changes</h2>
<h1 id="maintenance-release-2">Maintenance release</h1>
<h2 id="main-changes-2">Main Changes</h2>
<ul>
<li><p>General updates to fix known defects and enhancements implementation.</p></li>
<li><strong>CMSIS</strong> updates
@ -787,7 +825,7 @@
</ul></li>
</ul></li>
</ul>
<h2 id="contents-1">Contents</h2>
<h2 id="contents-2">Contents</h2>
<table>
<thead>
<tr class="header">
@ -814,8 +852,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section26_1" aria-hidden="true"> <label for="collapse-section26_1" aria-hidden="true"><strong>V1.26.1 / 26-March-2021</strong></label>
<div>
<h1 id="maintenance-release-2">Maintenance release</h1>
<h2 id="main-changes-2">Main Changes</h2>
<h1 id="maintenance-release-3">Maintenance release</h1>
<h2 id="main-changes-3">Main Changes</h2>
<ul>
<li><p>Patch release to mainly fix a wrong system clock configuration in some STM32F411/412/413 projects.</p></li>
<li><strong>HAL</strong>
@ -834,7 +872,7 @@
</ul></li>
</ul></li>
</ul>
<h2 id="contents-2">Contents</h2>
<h2 id="contents-3">Contents</h2>
<table>
<thead>
<tr class="header">
@ -856,8 +894,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section26" aria-hidden="true"> <label for="collapse-section26" aria-hidden="true"><strong>V1.26.0 / 12-February-2021</strong></label>
<div>
<h1 id="maintenance-release-3">Maintenance release</h1>
<h2 id="main-changes-3">Main Changes</h2>
<h1 id="maintenance-release-4">Maintenance release</h1>
<h2 id="main-changes-4">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li>Add new <strong>HAL FMPSMBUS extended</strong> driver to support FMPSMBUS fast Mode Plus.</li>
@ -1145,7 +1183,7 @@
</ul></li>
<li>For the complete list of changes, please refer to the release notes of each firmware component</li>
</ul>
<h2 id="contents-3">Contents</h2>
<h2 id="contents-4">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -1540,8 +1578,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section25_2" aria-hidden="true"> <label for="collapse-section25_2" aria-hidden="true"><strong>V1.25.2 / 22-October-2020</strong></label>
<div>
<h1 id="maintenance-release-4">Maintenance release</h1>
<h2 id="main-changes-4">Main Changes</h2>
<h1 id="maintenance-release-5">Maintenance release</h1>
<h2 id="main-changes-5">Main Changes</h2>
<ul>
<li><p>Patch release of STM32CubeF4 Firmware Package.</p></li>
<li><p><strong>HAL</strong></p>
@ -1555,7 +1593,7 @@
</ul></li>
</ul></li>
</ul>
<h2 id="contents-4">Contents</h2>
<h2 id="contents-5">Contents</h2>
<table>
<thead>
<tr class="header">
@ -1577,8 +1615,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section25_1" aria-hidden="true"> <label for="collapse-section25_1" aria-hidden="true"><strong>V1.25.1 / 14-August-2020</strong></label>
<div>
<h1 id="maintenance-release-5">Maintenance release</h1>
<h2 id="main-changes-5">Main Changes</h2>
<h1 id="maintenance-release-6">Maintenance release</h1>
<h2 id="main-changes-6">Main Changes</h2>
<ul>
<li><p>Patch release to fix known defects and enhancements implementation.</p></li>
<li><p><strong>HAL</strong></p>
@ -1609,7 +1647,7 @@
</ul></li>
</ul></li>
</ul>
<h2 id="contents-5">Contents</h2>
<h2 id="contents-6">Contents</h2>
<table>
<thead>
<tr class="header">
@ -1631,8 +1669,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section25" aria-hidden="true"> <label for="collapse-section25" aria-hidden="true"><strong>V1.25.0 / 12-February-2020</strong></label>
<div>
<h1 id="maintenance-release-6">Maintenance release</h1>
<h2 id="main-changes-6">Main Changes</h2>
<h1 id="maintenance-release-7">Maintenance release</h1>
<h2 id="main-changes-7">Main Changes</h2>
<ul>
<li>Add new <strong>HAL FMPSMBUS</strong> and <strong>LL FMPI2C</strong> drivers</li>
<li>General updates to fix known defects and enhancements implementation</li>
@ -1733,7 +1771,7 @@
</ul></li>
<li><p>For the complete list of changes, please refer to the release notes of each firmware component</p></li>
</ul>
<h2 id="contents-6">Contents</h2>
<h2 id="contents-7">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -2112,8 +2150,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section24_2" aria-hidden="true"> <label for="collapse-section24_2" aria-hidden="true"><strong>V1.24.2 / 06-December-2019</strong></label>
<div>
<h1 id="maintenance-release-7">Maintenance release</h1>
<h2 id="main-changes-7">Main Changes</h2>
<h1 id="maintenance-release-8">Maintenance release</h1>
<h2 id="main-changes-8">Main Changes</h2>
<ul>
<li><p><strong>Patch release to fix known defects and enhancements implementation</strong></p></li>
<li><strong>HAL</strong>
@ -2134,7 +2172,7 @@
</ul></li>
<li><p>For the complete list of changes, please refer to the release notes of each firmware component</p></li>
</ul>
<h2 id="contents-7">Contents</h2>
<h2 id="contents-8">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -2162,8 +2200,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section24_1" aria-hidden="true"> <label for="collapse-section24_1" aria-hidden="true"><strong>V1.24.1 / 12-April-2019</strong></label>
<div>
<h1 id="maintenance-release-8">Maintenance release</h1>
<h2 id="main-changes-8">Main Changes</h2>
<h1 id="maintenance-release-9">Maintenance release</h1>
<h2 id="main-changes-9">Main Changes</h2>
<ul>
<li><strong>Patch release to fix mainly the I2C send break issue with IT processes API’s</strong></li>
<li><strong>HAL I2C</strong> update
@ -2195,7 +2233,7 @@
<li>Software Quality improvement with a fix ofCodeSonar warning on PCD_Port_IRQHandler() and HCD_Port_IRQHandler()interrupt handlers</li>
</ul></li>
</ul>
<h2 id="contents-8">Contents</h2>
<h2 id="contents-9">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -2218,8 +2256,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section24" aria-hidden="true"> <label for="collapse-section24" aria-hidden="true"><strong>V1.24.0 / 08-February-2019</strong></label>
<div>
<h1 id="maintenance-release-9">Maintenance release</h1>
<h2 id="main-changes-9">Main Changes</h2>
<h1 id="maintenance-release-10">Maintenance release</h1>
<h2 id="main-changes-10">Main Changes</h2>
<ul>
<li><strong>HAL</strong>
<ul>
@ -2302,7 +2340,7 @@
</ul></li>
<li>For the complete list of changes, please refer to the release notes of each firmware component</li>
</ul>
<h2 id="contents-9">Contents</h2>
<h2 id="contents-10">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -2676,8 +2714,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section23" aria-hidden="true"> <label for="collapse-section23" aria-hidden="true"><strong>V1.23.0 / 23-November-2018</strong></label>
<div>
<h1 id="maintenance-release-10">Maintenance release</h1>
<h2 id="main-changes-10">Main Changes</h2>
<h1 id="maintenance-release-11">Maintenance release</h1>
<h2 id="main-changes-11">Main Changes</h2>
<ul>
<li><strong>Maintenance release:</strong>
<ul>
@ -2689,8 +2727,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section22" aria-hidden="true"> <label for="collapse-section22" aria-hidden="true"><strong>V1.22.0 / 26-October-2018</strong></label>
<div>
<h1 id="maintenance-release-11">Maintenance release</h1>
<h2 id="main-changes-11">Main Changes</h2>
<h1 id="maintenance-release-12">Maintenance release</h1>
<h2 id="main-changes-12">Main Changes</h2>
<ul>
<li>Thanks to the acquisition of <strong>Draupner Graphics A/S</strong>, ST is extending the STM32 ecosystem with advanced and easy to use graphic software solution enabling stunning GUI additions to embedded devices. <strong>TouchGFX</strong> solution is now fully part of STM32CubeF4.</li>
<li><p>TouchGFX examples and demonstrations can be accessed directly through the TouchGFX Designer tool. Here you simply create a new project, select the appropriate ST board in the Application Template section and select whatever demonstration or example you want in the UI Template selector. After this you will have a TouchGFX application ready to compile and flash to the selected ST board. More information are available <a href="https://touchgfx.zendesk.com/hc/en-us/articles/206159259-Step-1-Installation-of-TouchGFX">here</a></p></li>
@ -2717,7 +2755,7 @@
</ul></li>
<li><p>For the complete list of changes, please refer to the release notes of each firmware component</p></li>
</ul>
<h2 id="contents-10">Contents</h2>
<h2 id="contents-11">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -3095,8 +3133,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section21" aria-hidden="true"> <label for="collapse-section21" aria-hidden="true"><strong>V1.21.0 / 23-February-2018</strong></label>
<div>
<h1 id="maintenance-release-12">Maintenance release</h1>
<h2 id="main-changes-12">Main Changes</h2>
<h1 id="maintenance-release-13">Maintenance release</h1>
<h2 id="main-changes-13">Main Changes</h2>
<ul>
<li><p>General updates to fix known defects and enhancements implementation</p></li>
<li><strong>HAL</strong>
@ -3126,7 +3164,7 @@
</ul></li>
<li><p>For the complete list of changes, please refer to the release notes of each firmware component</p></li>
</ul>
<h2 id="contents-11">Contents</h2>
<h2 id="contents-12">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -3496,12 +3534,12 @@
<div class="collapse">
<input type="checkbox" id="collapse-section18" aria-hidden="true"> <label for="collapse-section18" aria-hidden="true"><strong>V1.18.0 / 07-November-2017</strong></label>
<div>
<h1 id="maintenance-release-13">Maintenance release</h1>
<h2 id="main-changes-13">Main Changes</h2>
<h1 id="maintenance-release-14">Maintenance release</h1>
<h2 id="main-changes-14">Main Changes</h2>
<ul>
<li>Package Clean-up: remove unwanted project folders</li>
</ul>
<h2 id="contents-12">Contents</h2>
<h2 id="contents-13">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -3871,8 +3909,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section17" aria-hidden="true"> <label for="collapse-section17" aria-hidden="true"><strong>V1.17.0 / 06-October-2017</strong></label>
<div>
<h1 id="maintenance-release-14">Maintenance release</h1>
<h2 id="main-changes-14">Main Changes</h2>
<h1 id="maintenance-release-15">Maintenance release</h1>
<h2 id="main-changes-15">Main Changes</h2>
<ul>
<li>General updates to be compliant with Linux platforms</li>
<li>General update to fix known defects and several implementations enhancement</li>
@ -3931,7 +3969,7 @@
</ul></li>
<li>For the complete list of changes, please refer to the release notes of each firmware component</li>
</ul>
<h2 id="contents-13">Contents</h2>
<h2 id="contents-14">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -4301,8 +4339,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section16" aria-hidden="true"> <label for="collapse-section16" aria-hidden="true"><strong>V1.16.0 / 14-April-2017</strong></label>
<div>
<h1 id="maintenance-release-15">Maintenance release</h1>
<h2 id="main-changes-15">Main Changes</h2>
<h1 id="maintenance-release-16">Maintenance release</h1>
<h2 id="main-changes-16">Main Changes</h2>
<ul>
<li><p>General update to fix known defects and several implementations enhancement</p></li>
<li><strong>HAL</strong>
@ -4335,7 +4373,7 @@
</ul></li>
<li><p>For the complete list of changes, please refer to the release notes of each firmware component</p></li>
</ul>
<h2 id="contents-14">Contents</h2>
<h2 id="contents-15">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -4696,8 +4734,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section15" aria-hidden="true"> <label for="collapse-section15" aria-hidden="true"><strong>V1.15.0 / 17-February-2017</strong></label>
<div>
<h1 id="maintenance-release-16">Maintenance release</h1>
<h2 id="main-changes-16">Main Changes</h2>
<h1 id="maintenance-release-17">Maintenance release</h1>
<h2 id="main-changes-17">Main Changes</h2>
<ul>
<li>Add the support of the STM32F413H-Discovery board
<ul>
@ -4772,7 +4810,7 @@
</ul></li>
<li><p>For the complete list of changes, please refer to the release notes of each firmware component</p></li>
</ul>
<h2 id="contents-15">Contents</h2>
<h2 id="contents-16">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -5133,8 +5171,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section14" aria-hidden="true"> <label for="collapse-section14" aria-hidden="true"><strong>V1.14.0 / 04-November-2016</strong></label>
<div>
<h1 id="maintenance-release-17">Maintenance release</h1>
<h2 id="main-changes-17">Main Changes</h2>
<h1 id="maintenance-release-18">Maintenance release</h1>
<h2 id="main-changes-18">Main Changes</h2>
<ul>
<li>Official release to add the support of <strong>STM32F413xx and STM32F423xx</strong> devices</li>
<li><p>Fix known defects and several implementation enhancement</p></li>
@ -5184,7 +5222,7 @@
</ul></li>
<li><p>For the complete list of changes, please refer to the release notes of each firmware component</p></li>
</ul>
<h2 id="contents-16">Contents</h2>
<h2 id="contents-17">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -5545,12 +5583,12 @@
<div class="collapse">
<input type="checkbox" id="collapse-section13_1" aria-hidden="true"> <label for="collapse-section13_1" aria-hidden="true"><strong>V1.13.1 / 22-September-2016</strong></label>
<div>
<h1 id="maintenance-release-18">Maintenance release</h1>
<h2 id="main-changes-18">Main Changes</h2>
<h1 id="maintenance-release-19">Maintenance release</h1>
<h2 id="main-changes-19">Main Changes</h2>
<ul>
<li><strong>Patch release to fix issues in I2C/FMPI2C HAL drivers</strong></li>
</ul>
<h2 id="contents-17">Contents</h2>
<h2 id="contents-18">Contents</h2>
<table>
<thead>
<tr class="header">
@ -5572,8 +5610,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section13" aria-hidden="true"> <label for="collapse-section13" aria-hidden="true"><strong>V1.13.0 / 01-July-2016</strong></label>
<div>
<h1 id="maintenance-release-19">Maintenance release</h1>
<h2 id="main-changes-19">Main Changes</h2>
<h1 id="maintenance-release-20">Maintenance release</h1>
<h2 id="main-changes-20">Main Changes</h2>
<ul>
<li>Fix known defects and enhancements implementation</li>
<li><strong>HAL</strong>
@ -5620,7 +5658,7 @@
</ul></li>
<li>For the complete list of changes, please refer to the release notes of each firmware component</li>
</ul>
<h2 id="contents-18">Contents</h2>
<h2 id="contents-19">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -5979,8 +6017,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section12" aria-hidden="true"> <label for="collapse-section12" aria-hidden="true"><strong>V1.12.0 / 01-July-2016</strong></label>
<div>
<h1 id="maintenance-release-20">Maintenance release</h1>
<h2 id="main-changes-20">Main Changes</h2>
<h1 id="maintenance-release-21">Maintenance release</h1>
<h2 id="main-changes-21">Main Changes</h2>
<ul>
<li>Official release to add the support of <strong>STM32F412cx, STM32F412rx, STM32F412vx and STM32F412zx</strong> devices</li>
<li><p>Fix known defects and several implementation enhancement</p></li>
@ -6021,7 +6059,7 @@
</ul></li>
<li><p>For the complete list of changes, please refer to the release notes of each firmware component</p></li>
</ul>
<h2 id="contents-19">Contents</h2>
<h2 id="contents-20">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -6379,8 +6417,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section11" aria-hidden="true"> <label for="collapse-section11" aria-hidden="true"><strong>V1.11.0 / 29-January-2016</strong></label>
<div>
<h1 id="maintenance-release-21">Maintenance release</h1>
<h2 id="main-changes-21">Main Changes</h2>
<h1 id="maintenance-release-22">Maintenance release</h1>
<h2 id="main-changes-22">Main Changes</h2>
<ul>
<li><strong>Fix known defects and enhancements implementation</strong></li>
<li><strong>HAL</strong>
@ -6417,7 +6455,7 @@
</ul></li>
<li>For the complete list of changes, please refer to the release notes of each firmware component</li>
</ul>
<h2 id="contents-20">Contents</h2>
<h2 id="contents-21">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -6774,12 +6812,12 @@
<div class="collapse">
<input type="checkbox" id="collapse-section10_1" aria-hidden="true"> <label for="collapse-section10_1" aria-hidden="true"><strong>V1.10.1 / 11-December-2015</strong></label>
<div>
<h1 id="maintenance-release-22">Maintenance release</h1>
<h2 id="main-changes-22">Main Changes</h2>
<h1 id="maintenance-release-23">Maintenance release</h1>
<h2 id="main-changes-23">Main Changes</h2>
<ul>
<li>For the complete list of changes, please refer to the release notes of each firmware component</li>
</ul>
<h2 id="contents-21">Contents</h2>
<h2 id="contents-22">Contents</h2>
<table>
<thead>
<tr class="header">
@ -6801,8 +6839,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section10" aria-hidden="true"> <label for="collapse-section10" aria-hidden="true"><strong>V1.10.0 / 13-November-2015</strong></label>
<div>
<h1 id="maintenance-release-23">Maintenance release</h1>
<h2 id="main-changes-23">Main Changes</h2>
<h1 id="maintenance-release-24">Maintenance release</h1>
<h2 id="main-changes-24">Main Changes</h2>
<ul>
<li><strong>Support new boards: STM32F411E-Discovery, STM32F446ZE NUCLEO144 and STM32F429ZI NUCLEO144</strong></li>
<li><p><strong>Fix known defects and enhancements implementation</strong></p></li>
@ -6838,7 +6876,7 @@
</ul></li>
<li><p>For the complete list of changes, please refer to the release notes of each firmware component</p></li>
</ul>
<h2 id="contents-22">Contents</h2>
<h2 id="contents-23">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -7185,8 +7223,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section9" aria-hidden="true"> <label for="collapse-section9" aria-hidden="true"><strong>V1.9.0 / 09-October-2015</strong></label>
<div>
<h1 id="maintenance-release-24">Maintenance release</h1>
<h2 id="main-changes-24">Main Changes</h2>
<h1 id="maintenance-release-25">Maintenance release</h1>
<h2 id="main-changes-25">Main Changes</h2>
<ul>
<li>Maintenance release to fix known defects and enhancements implementation</li>
<li><strong>HAL</strong>
@ -7228,7 +7266,7 @@
</ul></li>
<li>For the complete list of changes, please refer to the release notes of each firmware component</li>
</ul>
<h2 id="contents-23">Contents</h2>
<h2 id="contents-24">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -7567,8 +7605,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true"><strong>V1.8.0 / 14-August-2015</strong></label>
<div>
<h1 id="maintenance-release-25">Maintenance release</h1>
<h2 id="main-changes-25">Main Changes</h2>
<h1 id="maintenance-release-26">Maintenance release</h1>
<h2 id="main-changes-26">Main Changes</h2>
<ul>
<li><strong>Official release to support STM32F469xx, STM32F479xx, STM32F410Cx, STM32F410Rx</strong> and <strong>STM32F410Tx devices</strong></li>
<li><p><strong>Fix known defects and several enhancements implementation</strong></p></li>
@ -7607,7 +7645,7 @@
</ul></li>
<li><p>For the complete list of changes, please refer to the release notes of each firmware components</p></li>
</ul>
<h2 id="contents-24">Contents</h2>
<h2 id="contents-25">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -7949,8 +7987,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true"><strong>V1.7.0 / 01-July-2015</strong></label>
<div>
<h1 id="maintenance-release-26">Maintenance release</h1>
<h2 id="main-changes-26">Main Changes</h2>
<h1 id="maintenance-release-27">Maintenance release</h1>
<h2 id="main-changes-27">Main Changes</h2>
<ul>
<li><strong>Official release to support STM32446E-Nucleo board</strong></li>
<li><p><strong>Maintenance release to fix known defects</strong></p></li>
@ -7987,7 +8025,7 @@
</ul></li>
<li><p>For the complete list of changes, please refer to the release notes of each firmware components</p></li>
</ul>
<h2 id="contents-25">Contents</h2>
<h2 id="contents-26">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -8351,8 +8389,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true"><strong>V1.6.0 / 25-May-2015</strong></label>
<div>
<h1 id="maintenance-release-27">Maintenance release</h1>
<h2 id="main-changes-27">Main Changes</h2>
<h1 id="maintenance-release-28">Maintenance release</h1>
<h2 id="main-changes-28">Main Changes</h2>
<ul>
<li><strong>Add support of System Workbench for STM32 (SW4STM32) toolchain</strong></li>
<li><p><strong>Maintenance release to fix known defects</strong></p></li>
@ -8392,7 +8430,7 @@
</ul></li>
<li><p>Fix compile issue in some projects (9 in total), mainly due to bad project settings</p></li>
</ul>
<h2 id="contents-26">Contents</h2>
<h2 id="contents-27">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -8749,8 +8787,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true"><strong>V1.5.0 / 25-May-2015</strong></label>
<div>
<h1 id="maintenance-release-28">Maintenance release</h1>
<h2 id="main-changes-28">Main Changes</h2>
<h1 id="maintenance-release-29">Maintenance release</h1>
<h2 id="main-changes-29">Main Changes</h2>
<ul>
<li><strong>Official release to support STM32F446xx devices</strong></li>
<li><p><strong>Fix known defects and several enhancements implementation</strong></p></li>
@ -8788,7 +8826,7 @@
</ul></li>
<li><p>For the complete list of changes, please refer to the release notes of each firmware components</p></li>
</ul>
<h2 id="contents-27">Contents</h2>
<h2 id="contents-28">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -9144,8 +9182,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"><strong>V1.4.0 / 25-May-2015</strong></label>
<div>
<h1 id="maintenance-release-29">Maintenance release</h1>
<h2 id="main-changes-29">Main Changes</h2>
<h1 id="maintenance-release-30">Maintenance release</h1>
<h2 id="main-changes-30">Main Changes</h2>
<ul>
<li><strong>Maintenance release to fix known defects and several enhancements implementation</strong></li>
<li><strong>HAL</strong>
@ -9194,7 +9232,7 @@
</ul></li>
<li><p>For the complete list of changes, please refer to the release notes of each firmware components</p></li>
</ul>
<h2 id="contents-28">Contents</h2>
<h2 id="contents-29">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -9541,8 +9579,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"><strong>V1.3.0 / 26-June-2014</strong></label>
<div>
<h1 id="maintenance-release-30">Maintenance release</h1>
<h2 id="main-changes-30">Main Changes</h2>
<h1 id="maintenance-release-31">Maintenance release</h1>
<h2 id="main-changes-31">Main Changes</h2>
<ul>
<li><p><strong>Full features release, containing all projects sources for the supported boards</strong></p></li>
<li><strong>Projects</strong>
@ -9562,7 +9600,7 @@
</ul></li>
<li><p>Use STM32CubeUpdater.exe utility V4.2.0</p></li>
</ul>
<h2 id="contents-29">Contents</h2>
<h2 id="contents-30">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -9898,8 +9936,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.2.0 / 19-June-2014</strong></label>
<div>
<h1 id="maintenance-release-31">Maintenance release</h1>
<h2 id="main-changes-31">Main Changes</h2>
<h1 id="maintenance-release-32">Maintenance release</h1>
<h2 id="main-changes-32">Main Changes</h2>
<ul>
<li><strong>Patch release for STM32CubeF4, adding support of STM32F411xE devices with several enhancements and bugs fix</strong>
<ul>
@ -9921,7 +9959,7 @@
</ul></li>
<li>Note: for the complete list of changes, please refer to the release notes of each Firmware component</li>
</ul>
<h2 id="contents-30">Contents</h2>
<h2 id="contents-31">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -10236,8 +10274,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1_1" aria-hidden="true"> <label for="collapse-section1_1" aria-hidden="true"><strong>V1.1.0 / 26-February-2014</strong></label>
<div>
<h1 id="maintenance-release-32">Maintenance release</h1>
<h2 id="main-changes-32">Main Changes</h2>
<h1 id="maintenance-release-33">Maintenance release</h1>
<h2 id="main-changes-33">Main Changes</h2>
<ul>
<li><strong>Add sources of STM324x9I-EVAL (both references MB1046 and MB1063), STM324xG-EVAL and STM32F429I-Discovery Demonstration</strong> (only for EWARM and MDK-ARM)
<ul>
@ -10247,7 +10285,7 @@
<li>Miscellaneous update on Examples, Applications, Demonstrations and Templates projects for some boards; for more details refer to the associated release notes</li>
<li>Minor update in STM324x9I-EVAL, STM324xG-EVAL and STM32F429I-Discovery uSD and EEPROM BSP drivers</li>
</ul>
<h2 id="contents-31">Contents</h2>
<h2 id="contents-32">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -10549,12 +10587,12 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 18-February-2014</strong></label>
<div>
<h1 id="maintenance-release-33">Maintenance release</h1>
<h2 id="main-changes-33">Main Changes</h2>
<h1 id="maintenance-release-34">Maintenance release</h1>
<h2 id="main-changes-34">Main Changes</h2>
<ul>
<li><strong>First official release of STM32CubeF4 (STM32Cube for STM32F4 Series)</strong></li>
</ul>
<h2 id="contents-32">Contents</h2>
<h2 id="contents-33">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>

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_htmresc/ReleaseNotes_Patch.html
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
<html>
<head>
<meta http-equiv="content-type" content="text/html; charset=windows-1252">
</head>
<body>
<font color="blue"><b><u>STM32CubeF4 Firmware Package V1.26.2 /
16-July-2021</u></b></font><br>
<br>
<b><u>Main Changes</u></b><br>
<ul>
<li>
<h3
id="patch-release-to-fix-known-defects-and-enhancements-implementation."
style="font-size: calc(1rem * var(--heading-ratio)); margin:
calc(1.5 * var(--universal-margin)) var(--universal-margin);
font-weight: 500; padding-left: calc(2 *
var(--universal-margin)); color: rgb(17, 17, 17); font-style:
normal; font-variant-ligatures: normal; font-variant-caps:
normal; letter-spacing: normal; orphans: 2; text-align: start;
text-indent: 0px; text-transform: none; white-space: normal;
widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px;
text-decoration-thickness: initial; text-decoration-style:
initial; text-decoration-color: initial;">Patch release to fix
known defects and enhancements implementation.</h3>
</li>
</ul>
</body>
</html>
<font color="blue"><b><u>STM32CubeF4 Firmware Package V1.27.1 /22-June-2022</u></b></font><br>
<br>
<b><u>Main Changes</u></b><br><ul style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-size: medium; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: 1; word-spacing: 0px;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="color: black; font-family: Verdana,sans-serif; font-size: 10pt;">Patch release of STM32CubeF4 Firmware package.</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="color: black; font-family: Verdana,sans-serif; font-size: 10pt;">Update HAL ETH driver.<br>
</span></li></ul>

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package.xml
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<?xml version="1.0" encoding="ISO-8859-1" standalone="no"?>
<Package DBVersion="2.0">
<PackDescription Release="FW.F4.1.27.0" >
<Note Release="ReleaseNotes.html" />
<PackDescription Release="FW.F4.1.27.0" Patch="FW.F4.1.27.1">
<Note Release="ReleaseNotes.html" Patch="ReleaseNotes_Patch.html"/>
</PackDescription>
</Package>