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Release v1.8.1

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This commit is contained in:
Eya 2020-08-28 17:16:38 +01:00
parent 5ddefcd6a6
commit 6ead386a08
24 changed files with 1912 additions and 987 deletions
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1
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h
View File

@ -57,6 +57,7 @@ typedef enum
* @}
*/
/* Exported types ------------------------------------------------------------*/
extern __IO uint32_t uwTick;
extern uint32_t uwTickPrio;
extern HAL_TickFreqTypeDef uwTickFreq;

112
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_hcd.h
View File

@ -108,8 +108,8 @@ typedef struct
/** @defgroup HCD_Speed HCD Speed
* @{
*/
#define HCD_SPEED_FULL USBH_FS_SPEED
#define HCD_SPEED_LOW USBH_LS_SPEED
#define HCD_SPEED_FULL USBH_FSLS_SPEED
#define HCD_SPEED_LOW USBH_FSLS_SPEED
/**
* @}
@ -142,9 +142,9 @@ typedef struct
/* Exported macro ------------------------------------------------------------*/
/** @defgroup HCD_Exported_Macros HCD Exported Macros
* @brief macros to handle interrupts and specific clock configurations
* @{
*/
* @brief macros to handle interrupts and specific clock configurations
* @{
*/
#define __HAL_HCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
#define __HAL_HCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
@ -169,19 +169,15 @@ typedef struct
/** @defgroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions
* @{
*/
HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd);
HAL_StatusTypeDef HAL_HCD_DeInit(HCD_HandleTypeDef *hhcd);
HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd,
uint8_t ch_num,
uint8_t epnum,
uint8_t dev_address,
uint8_t speed,
uint8_t ep_type,
uint16_t mps);
HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd);
HAL_StatusTypeDef HAL_HCD_DeInit(HCD_HandleTypeDef *hhcd);
HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd, uint8_t ch_num,
uint8_t epnum, uint8_t dev_address,
uint8_t speed, uint8_t ep_type, uint16_t mps);
HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, uint8_t ch_num);
void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd);
void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd);
HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, uint8_t ch_num);
void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd);
void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd);
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
/** @defgroup HAL_HCD_Callback_ID_enumeration_definition HAL USB OTG HCD Callback ID enumeration definition
@ -190,14 +186,14 @@ void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd);
*/
typedef enum
{
HAL_HCD_SOF_CB_ID = 0x01, /*!< USB HCD SOF callback ID */
HAL_HCD_CONNECT_CB_ID = 0x02, /*!< USB HCD Connect callback ID */
HAL_HCD_DISCONNECT_CB_ID = 0x03, /*!< USB HCD Disconnect callback ID */
HAL_HCD_PORT_ENABLED_CB_ID = 0x04, /*!< USB HCD Port Enable callback ID */
HAL_HCD_PORT_DISABLED_CB_ID = 0x05, /*!< USB HCD Port Disable callback ID */
HAL_HCD_SOF_CB_ID = 0x01, /*!< USB HCD SOF callback ID */
HAL_HCD_CONNECT_CB_ID = 0x02, /*!< USB HCD Connect callback ID */
HAL_HCD_DISCONNECT_CB_ID = 0x03, /*!< USB HCD Disconnect callback ID */
HAL_HCD_PORT_ENABLED_CB_ID = 0x04, /*!< USB HCD Port Enable callback ID */
HAL_HCD_PORT_DISABLED_CB_ID = 0x05, /*!< USB HCD Port Disable callback ID */
HAL_HCD_MSPINIT_CB_ID = 0x06, /*!< USB HCD MspInit callback ID */
HAL_HCD_MSPDEINIT_CB_ID = 0x07 /*!< USB HCD MspDeInit callback ID */
HAL_HCD_MSPINIT_CB_ID = 0x06, /*!< USB HCD MspInit callback ID */
HAL_HCD_MSPDEINIT_CB_ID = 0x07 /*!< USB HCD MspDeInit callback ID */
} HAL_HCD_CallbackIDTypeDef;
/**
@ -217,10 +213,16 @@ typedef void (*pHCD_HC_NotifyURBChangeCallbackTypeDef)(HCD_HandleTypeDef *hhcd,
* @}
*/
HAL_StatusTypeDef HAL_HCD_RegisterCallback(HCD_HandleTypeDef *hhcd, HAL_HCD_CallbackIDTypeDef CallbackID, pHCD_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_HCD_UnRegisterCallback(HCD_HandleTypeDef *hhcd, HAL_HCD_CallbackIDTypeDef CallbackID);
HAL_StatusTypeDef HAL_HCD_RegisterCallback(HCD_HandleTypeDef *hhcd,
HAL_HCD_CallbackIDTypeDef CallbackID,
pHCD_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_HCD_UnRegisterCallback(HCD_HandleTypeDef *hhcd,
HAL_HCD_CallbackIDTypeDef CallbackID);
HAL_StatusTypeDef HAL_HCD_RegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd,
pHCD_HC_NotifyURBChangeCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_HCD_RegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd, pHCD_HC_NotifyURBChangeCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_HCD_UnRegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd);
#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
/**
@ -231,25 +233,21 @@ HAL_StatusTypeDef HAL_HCD_UnRegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef
/** @addtogroup HCD_Exported_Functions_Group2 Input and Output operation functions
* @{
*/
HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
uint8_t ch_num,
uint8_t direction,
uint8_t ep_type,
uint8_t token,
uint8_t *pbuff,
uint16_t length,
uint8_t do_ping);
HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd, uint8_t ch_num,
uint8_t direction, uint8_t ep_type,
uint8_t token, uint8_t *pbuff,
uint16_t length, uint8_t do_ping);
/* Non-Blocking mode: Interrupt */
void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd);
void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_PortEnabled_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_PortDisabled_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd,
uint8_t chnum,
HCD_URBStateTypeDef urb_state);
void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd);
void HAL_HCD_WKUP_IRQHandler(HCD_HandleTypeDef *hhcd);
void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_PortEnabled_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_PortDisabled_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, uint8_t chnum,
HCD_URBStateTypeDef urb_state);
/**
* @}
*/
@ -258,9 +256,12 @@ void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd,
/** @addtogroup HCD_Exported_Functions_Group3 Peripheral Control functions
* @{
*/
HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd);
HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd);
HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd);
HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd);
HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd);
HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd);
/**
* @}
*/
/**
* @}
*/
@ -271,10 +272,11 @@ HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd);
*/
HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd);
HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnum);
uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum);
HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chnum);
uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum);
uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd);
uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd);
/**
* @}
*/
@ -285,13 +287,11 @@ uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd);
/* Private macros ------------------------------------------------------------*/
/** @defgroup HCD_Private_Macros HCD Private Macros
* @{
*/
* @{
*/
/**
* @}
*/
/* Private functions prototypes ----------------------------------------------*/
/** @defgroup HCD_Private_Functions_Prototypes HCD Private Functions Prototypes
* @{
@ -306,14 +306,6 @@ uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd);
* @{
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/

5
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h
View File

@ -170,6 +170,7 @@ typedef enum
#define HAL_I2C_ERROR_TIMEOUT 0x00000020U /*!< Timeout Error */
#define HAL_I2C_ERROR_SIZE 0x00000040U /*!< Size Management error */
#define HAL_I2C_ERROR_DMA_PARAM 0x00000080U /*!< DMA Parameter Error */
#define HAL_I2C_WRONG_START 0x00000200U /*!< Wrong start Error */
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
#define HAL_I2C_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid Callback error */
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
@ -181,7 +182,11 @@ typedef enum
* @brief I2C handle Structure definition
* @{
*/
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
typedef struct __I2C_HandleTypeDef
#else
typedef struct
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
{
I2C_TypeDef *Instance; /*!< I2C registers base address */

329
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pcd.h
View File

@ -104,22 +104,22 @@ typedef struct __PCD_HandleTypeDef
typedef struct
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
PCD_TypeDef *Instance; /*!< Register base address */
PCD_InitTypeDef Init; /*!< PCD required parameters */
__IO uint8_t USB_Address; /*!< USB Address */
PCD_TypeDef *Instance; /*!< Register base address */
PCD_InitTypeDef Init; /*!< PCD required parameters */
__IO uint8_t USB_Address; /*!< USB Address */
#if defined (USB_OTG_FS)
PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */
PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */
PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */
PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */
#endif /* defined (USB_OTG_FS) */
#if defined (USB)
PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
#endif /* defined (USB) */
HAL_LockTypeDef Lock; /*!< PCD peripheral status */
__IO PCD_StateTypeDef State; /*!< PCD communication state */
__IO uint32_t ErrorCode; /*!< PCD Error code */
uint32_t Setup[12]; /*!< Setup packet buffer */
PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
HAL_LockTypeDef Lock; /*!< PCD peripheral status */
__IO PCD_StateTypeDef State; /*!< PCD communication state */
__IO uint32_t ErrorCode; /*!< PCD Error code */
uint32_t Setup[12]; /*!< Setup packet buffer */
PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
uint32_t BESL;
void *pData; /*!< Pointer to upper stack Handler */
@ -191,9 +191,9 @@ typedef struct
/* Exported macros -----------------------------------------------------------*/
/** @defgroup PCD_Exported_Macros PCD Exported Macros
* @brief macros to handle interrupts and specific clock configurations
* @{
*/
* @brief macros to handle interrupts and specific clock configurations
* @{
*/
#if defined (USB_OTG_FS)
#define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
#define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
@ -203,12 +203,11 @@ typedef struct
#define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
~(USB_OTG_PCGCCTL_STOPCLK)
#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= ~(USB_OTG_PCGCCTL_STOPCLK)
#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
@ -216,28 +215,28 @@ typedef struct
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
do { \
EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
} while(0U)
do { \
EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
} while(0U)
#endif /* defined (USB_OTG_FS) */
#if defined (USB)
#define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
#define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= (uint16_t)(~(__INTERRUPT__)))
#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
#define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
#define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
do { \
EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
} while(0U)
#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
do { \
EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
} while(0U)
#endif /* defined (USB) */
@ -272,7 +271,7 @@ typedef enum
HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */
HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */
HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */
HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */
HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */
@ -297,19 +296,31 @@ typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t
* @}
*/
HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd,
HAL_PCD_CallbackIDTypeDef CallbackID,
pPCD_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd,
HAL_PCD_CallbackIDTypeDef CallbackID);
HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
pPCD_DataOutStageCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
pPCD_DataInStageCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
pPCD_IsoOutIncpltCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
pPCD_IsoInIncpltCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
@ -325,6 +336,7 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd)
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd);
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
@ -349,16 +361,24 @@ void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type);
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint8_t *pBuf, uint32_t len);
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint8_t *pBuf, uint32_t len);
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
/**
* @}
*/
@ -384,15 +404,11 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @{
*/
#if defined (USB_OTG_FS)
#define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE 0x08U
#define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE 0x0CU
#define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U
#define USB_OTG_FS_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
#endif /* defined (USB_OTG_FS) */
#if defined (USB)
#define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
#define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
#endif /* defined (USB) */
/**
@ -402,10 +418,10 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
/** @defgroup PCD_EP0_MPS PCD EP0 MPS
* @{
*/
#define PCD_EP0MPS_64 DEP0CTL_MPS_64
#define PCD_EP0MPS_32 DEP0CTL_MPS_32
#define PCD_EP0MPS_16 DEP0CTL_MPS_16
#define PCD_EP0MPS_08 DEP0CTL_MPS_8
#define PCD_EP0MPS_64 EP_MPS_64
#define PCD_EP0MPS_32 EP_MPS_32
#define PCD_EP0MPS_16 EP_MPS_16
#define PCD_EP0MPS_08 EP_MPS_8
/**
* @}
*/
@ -466,8 +482,8 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
/* Private macros ------------------------------------------------------------*/
/** @defgroup PCD_Private_Macros PCD Private Macros
* @{
*/
* @{
*/
#if defined (USB)
/******************** Bit definition for USB_COUNTn_RX register *************/
#define USB_CNTRX_NBLK_MSK (0x1FU << 10)
@ -477,10 +493,10 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
/* GetENDPOINT */
#define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
#define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
/* ENDPOINT transfer */
#define USB_EP0StartXfer USB_EPStartXfer
#define USB_EP0StartXfer USB_EPStartXfer
/**
* @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
@ -489,8 +505,7 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param wType Endpoint Type.
* @retval None
*/
#define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
#define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
/**
* @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
@ -507,18 +522,19 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param bEpNum, bDir
* @retval None
*/
#define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \
if ((bDir) == 0U) \
{ \
/* OUT double buffered endpoint */ \
PCD_TX_DTOG((USBx), (bEpNum)); \
} \
else if ((bDir) == 1U) \
{ \
/* IN double buffered endpoint */ \
PCD_RX_DTOG((USBx), (bEpNum)); \
} \
} while(0)
#define PCD_FreeUserBuffer(USBx, bEpNum, bDir) \
do { \
if ((bDir) == 0U) \
{ \
/* OUT double buffered endpoint */ \
PCD_TX_DTOG((USBx), (bEpNum)); \
} \
else if ((bDir) == 1U) \
{ \
/* IN double buffered endpoint */ \
PCD_RX_DTOG((USBx), (bEpNum)); \
} \
} while(0)
/**
* @brief sets the status for tx transfer (bits STAT_TX[1:0]).
@ -527,21 +543,22 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param wState new state
* @retval None
*/
#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \
register uint16_t _wRegVal; \
\
#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \
do { \
uint16_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
/* toggle first bit ? */ \
if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
{ \
/* toggle first bit ? */ \
if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
{ \
_wRegVal ^= USB_EPTX_DTOG1; \
} \
/* toggle second bit ? */ \
if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
{ \
} \
/* toggle second bit ? */ \
if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
{ \
_wRegVal ^= USB_EPTX_DTOG2; \
} \
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
} \
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
} while(0) /* PCD_SET_EP_TX_STATUS */
/**
@ -551,19 +568,20 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param wState new state
* @retval None
*/
#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \
register uint16_t _wRegVal; \
#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \
do { \
uint16_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
/* toggle first bit ? */ \
if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
{ \
_wRegVal ^= USB_EPRX_DTOG1; \
_wRegVal ^= USB_EPRX_DTOG1; \
} \
/* toggle second bit ? */ \
if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
{ \
_wRegVal ^= USB_EPRX_DTOG2; \
_wRegVal ^= USB_EPRX_DTOG2; \
} \
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
} while(0) /* PCD_SET_EP_RX_STATUS */
@ -576,8 +594,9 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param wStatetx new state.
* @retval None
*/
#define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \
register uint16_t _wRegVal; \
#define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \
do { \
uint16_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
/* toggle first bit ? */ \
@ -629,10 +648,8 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param bEpNum Endpoint Number.
* @retval TRUE = endpoint in stall condition.
*/
#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
== USB_EP_TX_STALL)
#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
== USB_EP_RX_STALL)
#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
/**
* @brief set & clear EP_KIND bit.
@ -640,16 +657,18 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param bEpNum Endpoint Number.
* @retval None
*/
#define PCD_SET_EP_KIND(USBx, bEpNum) do { \
register uint16_t _wRegVal; \
#define PCD_SET_EP_KIND(USBx, bEpNum) \
do { \
uint16_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
\
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
} while(0) /* PCD_SET_EP_KIND */
#define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \
register uint16_t _wRegVal; \
#define PCD_CLEAR_EP_KIND(USBx, bEpNum) \
do { \
uint16_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
\
@ -680,16 +699,18 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param bEpNum Endpoint Number.
* @retval None
*/
#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \
register uint16_t _wRegVal; \
#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \
do { \
uint16_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
\
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
} while(0) /* PCD_CLEAR_RX_EP_CTR */
#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \
register uint16_t _wRegVal; \
#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \
do { \
uint16_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
\
@ -702,16 +723,18 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param bEpNum Endpoint Number.
* @retval None
*/
#define PCD_RX_DTOG(USBx, bEpNum) do { \
register uint16_t _wEPVal; \
#define PCD_RX_DTOG(USBx, bEpNum) \
do { \
uint16_t _wEPVal; \
\
_wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
\
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
} while(0) /* PCD_RX_DTOG */
#define PCD_TX_DTOG(USBx, bEpNum) do { \
register uint16_t _wEPVal; \
#define PCD_TX_DTOG(USBx, bEpNum) \
do { \
uint16_t _wEPVal; \
\
_wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
\
@ -723,8 +746,9 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param bEpNum Endpoint Number.
* @retval None
*/
#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \
register uint16_t _wRegVal; \
#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \
do { \
uint16_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
\
@ -734,8 +758,9 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
} \
} while(0) /* PCD_CLEAR_RX_DTOG */
#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \
register uint16_t _wRegVal; \
#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \
do { \
uint16_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
\
@ -752,8 +777,9 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param bAddr Address.
* @retval None
*/
#define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \
register uint16_t _wRegVal; \
#define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \
do { \
uint16_t _wRegVal; \
\
_wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
\
@ -778,23 +804,25 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param wAddr address to be set (must be word aligned).
* @retval None
*/
#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \
register __IO uint16_t *_wRegVal; \
register uint32_t _wRegBase = (uint32_t)USBx; \
\
_wRegBase += (uint32_t)(USBx)->BTABLE; \
_wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
*_wRegVal = ((wAddr) >> 1) << 1; \
} while(0) /* PCD_SET_EP_TX_ADDRESS */
#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \
do { \
__IO uint16_t *_wRegVal; \
uint32_t _wRegBase = (uint32_t)USBx; \
\
_wRegBase += (uint32_t)(USBx)->BTABLE; \
_wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
*_wRegVal = ((wAddr) >> 1) << 1; \
} while(0) /* PCD_SET_EP_TX_ADDRESS */
#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \
register __IO uint16_t *_wRegVal; \
register uint32_t _wRegBase = (uint32_t)USBx; \
\
_wRegBase += (uint32_t)(USBx)->BTABLE; \
_wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
*_wRegVal = ((wAddr) >> 1) << 1; \
} while(0) /* PCD_SET_EP_RX_ADDRESS */
#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \
do { \
__IO uint16_t *_wRegVal; \
uint32_t _wRegBase = (uint32_t)USBx; \
\
_wRegBase += (uint32_t)(USBx)->BTABLE; \
_wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
*_wRegVal = ((wAddr) >> 1) << 1; \
} while(0) /* PCD_SET_EP_RX_ADDRESS */
/**
* @brief Gets address of the tx/rx buffer.
@ -812,7 +840,8 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param wNBlocks no. of Blocks.
* @retval None
*/
#define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \
#define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \
do { \
(wNBlocks) = (wCount) >> 5; \
if (((wCount) & 0x1fU) == 0U) \
{ \
@ -821,7 +850,8 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
*(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
} while(0) /* PCD_CALC_BLK32 */
#define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \
#define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \
do { \
(wNBlocks) = (wCount) >> 1; \
if (((wCount) & 0x1U) != 0U) \
{ \
@ -830,7 +860,8 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
*(pdwReg) = (uint16_t)((wNBlocks) << 10); \
} while(0) /* PCD_CALC_BLK2 */
#define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) do { \
#define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \
do { \
uint32_t wNBlocks; \
if ((wCount) == 0U) \
{ \
@ -847,10 +878,11 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
} \
} while(0) /* PCD_SET_EP_CNT_RX_REG */
#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \
register uint32_t _wRegBase = (uint32_t)(USBx); \
register __IO uint16_t *pdwReg; \
\
#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \
do { \
uint32_t _wRegBase = (uint32_t)(USBx); \
__IO uint16_t *pdwReg; \
\
_wRegBase += (uint32_t)(USBx)->BTABLE; \
pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
@ -863,23 +895,25 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param wCount Counter value.
* @retval None
*/
#define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \
register uint32_t _wRegBase = (uint32_t)(USBx); \
register __IO uint16_t *_wRegVal; \
#define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \
do { \
uint32_t _wRegBase = (uint32_t)(USBx); \
__IO uint16_t *_wRegVal; \
\
_wRegBase += (uint32_t)(USBx)->BTABLE; \
_wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
*_wRegVal = (uint16_t)(wCount); \
} while(0)
} while(0)
#define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \
register uint32_t _wRegBase = (uint32_t)(USBx); \
register __IO uint16_t *_wRegVal; \
#define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \
do { \
uint32_t _wRegBase = (uint32_t)(USBx); \
__IO uint16_t *_wRegVal; \
\
_wRegBase += (uint32_t)(USBx)->BTABLE; \
_wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
} while(0)
} while(0)
/**
* @brief gets counter of the tx buffer.
@ -897,10 +931,13 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param wBuf0Addr buffer 0 address.
* @retval Counter value
*/
#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \
#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \
do { \
PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
} while(0) /* PCD_SET_EP_DBUF0_ADDR */
#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \
#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \
do { \
PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
} while(0) /* PCD_SET_EP_DBUF1_ADDR */
@ -912,7 +949,8 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param wBuf1Addr = buffer 1 address.
* @retval None
*/
#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \
#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \
do { \
PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
} while(0) /* PCD_SET_EP_DBUF_ADDR */
@ -935,7 +973,8 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param wCount: Counter value
* @retval None
*/
#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \
#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \
do { \
if ((bDir) == 0U) \
/* OUT endpoint */ \
{ \
@ -951,8 +990,9 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
} \
} while(0) /* SetEPDblBuf0Count*/
#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \
register uint32_t _wBase = (uint32_t)(USBx); \
#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \
do { \
uint32_t _wBase = (uint32_t)(USBx); \
__IO uint16_t *_wEPRegVal; \
\
if ((bDir) == 0U) \
@ -972,10 +1012,11 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
} \
} while(0) /* SetEPDblBuf1Count */
#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \
#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \
do { \
PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
} while(0) /* PCD_SET_EP_DBUF_CNT */
} while(0) /* PCD_SET_EP_DBUF_CNT */
/**
* @brief Gets buffer 0/1 rx/tx counter for double buffering.

6
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pcd_ex.h
View File

@ -53,10 +53,8 @@ HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size);
#endif /* defined (USB_OTG_FS) */
#if defined (USB)
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd,
uint16_t ep_addr,
uint16_t ep_kind,
uint32_t pmaadress);
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress);
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state);
#endif /* defined (USB) */

4
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_i2c.h
View File

@ -729,8 +729,8 @@ __STATIC_INLINE uint32_t LL_I2C_GetClockPeriod(I2C_TypeDef *I2Cx)
__STATIC_INLINE void LL_I2C_ConfigSpeed(I2C_TypeDef *I2Cx, uint32_t PeriphClock, uint32_t ClockSpeed,
uint32_t DutyCycle)
{
register uint32_t freqrange = 0x0U;
register uint32_t clockconfig = 0x0U;
uint32_t freqrange = 0x0U;
uint32_t clockconfig = 0x0U;
/* Compute frequency range */
freqrange = __LL_I2C_FREQ_HZ_TO_MHZ(PeriphClock);

79
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_usb.h
View File

@ -81,7 +81,7 @@ typedef enum
} USB_OTG_HCStateTypeDef;
/**
* @brief USB OTG Initialization Structure definition
* @brief USB Instance Initialization Structure definition
*/
typedef struct
{
@ -94,14 +94,14 @@ typedef struct
This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
uint32_t speed; /*!< USB Core speed.
This parameter can be any value of @ref USB_Core_Speed_ */
This parameter can be any value of @ref USB_Core_Speed */
uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA used only for OTG HS. */
uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */
uint32_t phy_itface; /*!< Select the used PHY interface.
This parameter can be any value of @ref USB_Core_PHY_ */
This parameter can be any value of @ref USB_Core_PHY */
uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
@ -116,6 +116,7 @@ typedef struct
uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */
uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */
} USB_OTG_CfgTypeDef;
typedef struct
@ -155,7 +156,7 @@ typedef struct
typedef struct
{
uint8_t dev_addr ; /*!< USB device address.
uint8_t dev_addr; /*!< USB device address.
This parameter must be a number between Min_Data = 1 and Max_Data = 255 */
uint8_t ch_num; /*!< Host channel number.
@ -197,13 +198,13 @@ typedef struct
uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */
uint32_t ErrCnt; /*!< Host channel error count.*/
uint32_t ErrCnt; /*!< Host channel error count. */
USB_OTG_URBStateTypeDef urb_state; /*!< URB state.
USB_OTG_URBStateTypeDef urb_state; /*!< URB state.
This parameter can be any value of @ref USB_OTG_URBStateTypeDef */
USB_OTG_HCStateTypeDef state; /*!< Host Channel state.
This parameter can be any value of @ref USB_OTG_HCStateTypeDef */
USB_OTG_HCStateTypeDef state; /*!< Host Channel state.
This parameter can be any value of @ref USB_OTG_HCStateTypeDef */
} USB_OTG_HCTypeDef;
#endif /* defined (USB_OTG_FS) */
@ -282,6 +283,10 @@ typedef struct
uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
uint32_t xfer_len_db; /*!< double buffer transfer length used with bulk double buffer in */
uint8_t xfer_fill_db; /*!< double buffer Need to Fill new buffer used with bulk_in */
} USB_EPTypeDef;
#endif /* defined (USB) */
@ -314,8 +319,8 @@ typedef struct
/** @defgroup USB_LL Device Speed
* @{
*/
#define USBD_FS_SPEED 2U
#define USBH_FS_SPEED 1U
#define USBD_FS_SPEED 2U
#define USBH_FSLS_SPEED 1U
/**
* @}
*/
@ -341,8 +346,8 @@ typedef struct
* @{
*/
#ifndef USBD_FS_TRDT_VALUE
#define USBD_FS_TRDT_VALUE 5U
#define USBD_DEFAULT_TRDT_VALUE 9U
#define USBD_FS_TRDT_VALUE 5U
#define USBD_DEFAULT_TRDT_VALUE 9U
#endif /* USBD_HS_TRDT_VALUE */
/**
* @}
@ -351,8 +356,8 @@ typedef struct
/** @defgroup USB_LL_Core_MPS USB Low Layer Core MPS
* @{
*/
#define USB_OTG_FS_MAX_PACKET_SIZE 64U
#define USB_OTG_MAX_EP0_SIZE 64U
#define USB_OTG_FS_MAX_PACKET_SIZE 64U
#define USB_OTG_MAX_EP0_SIZE 64U
/**
* @}
*/
@ -381,10 +386,10 @@ typedef struct
/** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS
* @{
*/
#define DEP0CTL_MPS_64 0U
#define DEP0CTL_MPS_32 1U
#define DEP0CTL_MPS_16 2U
#define DEP0CTL_MPS_8 3U
#define EP_MPS_64 0U
#define EP_MPS_32 1U
#define EP_MPS_16 2U
#define EP_MPS_8 3U
/**
* @}
*/
@ -474,10 +479,10 @@ typedef struct
/** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS
* @{
*/
#define DEP0CTL_MPS_64 0U
#define DEP0CTL_MPS_32 1U
#define DEP0CTL_MPS_16 2U
#define DEP0CTL_MPS_8 3U
#define EP_MPS_64 0U
#define EP_MPS_32 1U
#define EP_MPS_16 2U
#define EP_MPS_8 3U
/**
* @}
*/
@ -550,7 +555,9 @@ HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB
HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len);
HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
uint8_t ch_ep_num, uint16_t len);
void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len);
HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
@ -575,14 +582,12 @@ HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx);
HAL_StatusTypeDef USB_DriveVbus(USB_OTG_GlobalTypeDef *USBx, uint8_t state);
uint32_t USB_GetHostSpeed(USB_OTG_GlobalTypeDef *USBx);
uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef *USBx);
HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
uint8_t ch_num,
uint8_t epnum,
uint8_t dev_address,
uint8_t speed,
uint8_t ep_type,
uint16_t mps);
HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc);
HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num,
uint8_t epnum, uint8_t dev_address, uint8_t speed,
uint8_t ep_type, uint16_t mps);
HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx,
USB_OTG_HCTypeDef *hc);
uint32_t USB_HC_ReadInterrupt(USB_OTG_GlobalTypeDef *USBx);
HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num);
HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num);
@ -597,14 +602,11 @@ HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg);
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx);
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx);
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode);
HAL_StatusTypeDef USB_SetDevSpeed(USB_TypeDef *USBx, uint8_t speed);
HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef *USBx);
HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef *USBx, uint32_t num);
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep);
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep);
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep);
HAL_StatusTypeDef USB_WritePacket(USB_TypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len);
void *USB_ReadPacket(USB_TypeDef *USBx, uint8_t *dest, uint16_t len);
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep);
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep);
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address);
@ -618,11 +620,14 @@ uint32_t USB_ReadDevOutEPInterrupt(USB_TypeDef *USBx, uint8_t epnum);
uint32_t USB_ReadDevAllInEpInterrupt(USB_TypeDef *USBx);
uint32_t USB_ReadDevInEPInterrupt(USB_TypeDef *USBx, uint8_t epnum);
void USB_ClearInterrupts(USB_TypeDef *USBx, uint32_t interrupt);
HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx);
HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx);
void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf,
uint16_t wPMABufAddr, uint16_t wNBytes);
void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf,
uint16_t wPMABufAddr, uint16_t wNBytes);
#endif /* defined (USB) */
/**
* @}

3
Drivers/STM32F1xx_HAL_Driver/License.md Normal file
View File

@ -0,0 +1,3 @@
# Copyright (c) 2016 STMicroelectronics
This software component is licensed by STMicroelectronics under the **BSD 3-Clause** license. You may not use this file except in compliance with this license. You may obtain a copy of the license [here](https://opensource.org/licenses/BSD-3-Clause).

50
Drivers/STM32F1xx_HAL_Driver/README.md Normal file
View File

@ -0,0 +1,50 @@
# STM32CubeF1 HAL Driver MCU Component
## Overview
**STM32Cube** is an STMicroelectronics original initiative to ease the developers life by reducing efforts, time and cost.
**STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform, delivered for each STM32 series.
* The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product
* The STM32 HAL-LL drivers : an abstraction drivers layer, the API ensuring maximized portability across the STM32 portfolio
* The BSP Drivers of each evaluation or demonstration board provided by this STM32 series
* A consistent set of middlewares components such as RTOS, USB, FatFS, Graphics, STM32_TouchSensing_Library ...
* A full set of software projects (basic examples, applications or demonstrations) for each board provided by this STM32 series
Two models of publication are proposed for the STM32Cube embedded software:
* The monolithic **MCU Package** : all STM32Cube software modules of one STM32 series are present (Drivers, Middlewares, Projects, Utilities) in the repo (usual name **STM32Cubexx**, xx corresponding to the STM32 series)
* The **MCU component** : progressively from November 2019, each STM32Cube software module being part of the STM32Cube MCU Package, will be delivered as an individual repo, allowing the user to select and get only the required software functions.
## Description
This **stm32f1xx_hal_driver** MCU component repo is one element of the STM32CubeF1 MCU embedded software package, providing the **HAL-LL Drivers** part.
## License
Copyright (c) 2016 STMicroelectronics.
This software component is licensed by STMicroelectronics under BSD 3-Clause license. You may not use this file except in compliance with the License.
You may obtain a copy of the License [here](https://opensource.org/licenses/BSD-3-Clause).
## Release note
Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/stm32f1xx_hal_driver/blob/master/Release_Notes.html).
## Compatibility information
In this table, you can find the successive versions of this HAL-LL Driver component, in line with the corresponding versions of the full MCU package:
It is **crucial** that you use a consistent set of versions for the CMSIS Core - CMSIS Device - HAL, as mentioned in this table.
HAL Driver F1 | CMSIS Device F1 | CMSIS Core | Was delivered in the full MCU package
------------- | --------------- | ---------- | -------------------------------------
Tag v1.1.4 | Tag v4.3.1 | Tag v5.4.0_cm3 | Tag v1.8.0 (and following, if any, till next new tag)
Tag v1.1.5 | Tag v4.3.1 | Tag v5.4.0_cm3 | Tag v1.8.1 (and following, if any, till next new tag)
The full **STM32CubeF1** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeF1).
## Troubleshooting
If you have any issue with the **Software content** of this repo, you can [file an issue on Github](https://github.com/STMicroelectronics/stm32f1xx_hal_driver/issues/new).
For any other question related to the product, the tools, the environment, you can submit a topic on the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus).

107
Drivers/STM32F1xx_HAL_Driver/Release_Notes.html
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@ -38,11 +38,68 @@ This software component is licensed by ST under BSD 3-Clause license, the “Lic
<div class="col-sm-12 col-lg-8">
<h1 id="update-history"><strong>Update History</strong></h1>
<div class="collapse">
<input type="checkbox" id="collapse-section11" aria-hidden="true"> <label for="collapse-section11" aria-hidden="true"><strong>V1.1.4 / 26-June-2019</strong></label>
<input type="checkbox" id="collapse-section1_1_5" aria-hidden="true"> <label for="collapse-section1_1_5" aria-hidden="true"><strong>V1.1.5 / 30-July-2020</strong></label>
<div>
<h2 id="main-changes">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
</ul>
<h2 id="contents">Contents</h2>
<ul>
<li><strong>HAL</strong> driver
<ul>
<li>Enhance HAL_SetTickFreq() API robustness
<ul>
<li>Restore previous tick frequency when a wrong tick initialization occurs.</li>
</ul></li>
</ul></li>
<li><strong>HAL/LL I2C</strong> update
<ul>
<li>Update HAL_I2C_ER_IRQHandler() API to fix acknowledge failure issue with I2C memory IT processes
<ul>
<li>Add stop condition generation when NACK occurs.</li>
</ul></li>
<li>Update I2C_DMAXferCplt(), I2C_DMAError() and I2C_DMAAbort() APIs to fix hardfault issue when hdmatx and hdmarx parameters in i2c handle aren’t initialized (NULL pointer).
<ul>
<li>Add additional check on hi2c-&gt;hdmtx and hi2c-&gt;hdmarx before resetting DMA Tx/Rx complete callbacks</li>
</ul></li>
<li>Update HAL_I2C_ER_IRQHandler() API to fix acknowledge failure issue with I2C memory IT processes
<ul>
<li>Add stop condition generation when NACK occursHAL SMBUS</li>
</ul></li>
<li>Update HAL_I2C_Init() API to force software reset before setting new I2C configuration.</li>
<li>Update HAL I2C processes to report ErrorCode when wrong I2C start condition occurs
<ul>
<li>Add new ErrorCode define: HAL_I2C_WRONG_START</li>
<li>Set ErrorCode parameter in I2C handle to HAL_I2C_WRONG_START</li>
</ul></li>
<li>Update sequential APIs to avoid requesting a START when a STOP condition is not fully treated
<ul>
<li>Wait the end of STOP treatment by polling (with a timeout) the STOP bit on Control register CR1</li>
</ul></li>
<li>Update I2C_MasterReceiveRXNE() static API to avoid set the STOP bit again after the bit clearing by Hardware during the masking operation
<ul>
<li>Add new API I2C_WaitOnSTOPRequestThroughIT() to wait for stop bit.</li>
</ul></li>
</ul></li>
<li><strong>HAL/LL USB</strong> driver
<ul>
<li>Bug fix: USB_ReadPMA() and USB_WritePMA() by ensuring 16-bits access to USB PMA memory</li>
<li>Bug fix: correct USB RX count calculation</li>
<li>Fix USB Bulk transfer double buffer mode</li>
<li>Remove register keyword from USB defined macros as no more supported by C++ compiler</li>
<li>Minor rework on USBD_Start() and USBD_Stop() APIs: stopping device will be handled by HAL_PCD_DeInit() API.</li>
<li>Remove non used API for USB device mode.</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section11" aria-hidden="true"> <label for="collapse-section11" aria-hidden="true"><strong>V1.1.4 / 26-June-2019</strong></label>
<div>
<h2 id="main-changes-1">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li>Add support of HAL callback registration feature</li>
<li>Add new <strong>HAL EXTI</strong> driver</li>
<li>General updates to fix CodeSonar compilation warnings</li>
@ -56,7 +113,7 @@ This software component is licensed by ST under BSD 3-Clause license, the “Lic
<li>The feature disabled by default is available for the following HAL drivers:
<ul>
<li><strong>ADC, CEC, CAN, DAC, ETH, HCD, UART, USART, IRDA, SMARTCARD,</strong></li>
<li><strong>MMC, NAND, NOR, PCCARD, PCD, RTC, SD, SRAM, I2C, SPI, I2S, TIM and WWDG</strong></li>
<li><strong>MMC, NAND, NOR, PCCARD, PCD, RTC, SD, SRAM, SPI, I2S, TIM and WWDG</strong></li>
</ul></li>
<li>The feature may be enabled individually per HAL PPP driver by setting the corresponding definition USE_HAL_PPP_REGISTER_CALLBACKS to 1U in stm32f1xx_hal_conf.h project configuration file (template file stm32f1xx_hal_conf_template.h available from Drivers/STM32F1xx_HAL_Driver/Inc)</li>
<li>Once enabled , the user application may resort to HAL_PPP_RegisterCallback() to register specific callback function(s) and unregister it(them) with HAL_PPP_UnRegisterCallback()</li>
@ -170,32 +227,6 @@ This software component is licensed by ST under BSD 3-Clause license, the “Lic
<li>Add callback identifiers in HAL_SD_CallbackIDTypeDef enumerated typedef</li>
</ul></li>
</ul></li>
<li><strong>HAL I2C</strong> update
<ul>
<li>I2C API changes for MISRA-C 2012 compliance:
<ul>
<li>Rename HAL_I2C_Master_Sequential_Transmit_IT() to HAL_I2C_Master_Seq_Transmit_IT()</li>
<li>Rename HAL_I2C_Master_Sequentiel_Receive_IT() to HAL_I2C_Master_Seq_Receive_IT()</li>
<li>Rename HAL_I2C_Slave_Sequentiel_Transmit_IT() to HAL_I2C_Slave_Seq_Transmit_IT()</li>
<li>Rename HAL_I2C_Slave_Sequentiel_Receive_DMA() to HAL_I2C_Slave_Seq_Receive_DMA()</li>
</ul></li>
<li>Add support of I2C repeated start feature in DMA Mode With the following new API’s
<ul>
<li>HAL_I2C_Master_Seq_Transmit_DMA()</li>
<li>HAL_I2C_Master_Seq_Receive_DMA()</li>
<li>HAL_I2C_Slave_Seq_Transmit_DMA()</li>
<li>HAL_I2C_Slave_Seq_Receive_DMA()</li>
</ul></li>
<li>Add new I2C transfer options to easy manage the sequential transfers
<ul>
<li>I2C_OTHER_FRAME</li>
<li>I2C_OTHER_AND_LAST_FRAME</li>
</ul></li>
<li>Fix I2C send break issue in IT processes
<ul>
<li>Add additional check on hi2c-&gt;hdmatxand hi2c-&gt;hdmarx to avoid the DMA request enable when ITmode is used.</li>
</ul></li>
</ul></li>
<li><strong>HAL SPI</strong> update
<ul>
<li>Align HAL/LL SPI driver with latest updates and enhancements</li>
@ -273,7 +304,7 @@ This software component is licensed by ST under BSD 3-Clause license, the “Lic
<div class="collapse">
<input type="checkbox" id="collapse-section10" aria-hidden="true"> <label for="collapse-section10" aria-hidden="true"><strong>V1.1.3 / 09-October-2018</strong></label>
<div>
<h2 id="main-changes-1">Main Changes</h2>
<h2 id="main-changes-2">Main Changes</h2>
<ul>
<li><strong>Maintenance release to fix known defects and enhancements implementation</strong></li>
<li><strong>Generic drivers changes</strong></li>
@ -316,7 +347,7 @@ This software component is licensed by ST under BSD 3-Clause license, the “Lic
<div class="collapse">
<input type="checkbox" id="collapse-section9" aria-hidden="true"> <label for="collapse-section9" aria-hidden="true"><strong>V1.1.2 / 09-March-2018</strong></label>
<div>
<h2 id="main-changes-2">Main Changes</h2>
<h2 id="main-changes-3">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li>Remove Date and version from header files</li>
@ -394,7 +425,7 @@ This software component is licensed by ST under BSD 3-Clause license, the “Lic
<div class="collapse">
<input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true"><strong>V1.1.1 / 12-May-2017</strong></label>
<div>
<h2 id="main-changes-3">Main Changes</h2>
<h2 id="main-changes-4">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li><strong>HAL Generic</strong> update
@ -420,7 +451,7 @@ This software component is licensed by ST under BSD 3-Clause license, the “Lic
<div class="collapse">
<input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true"><strong>V1.1.0 / 14-April-2017</strong></label>
<div>
<h2 id="main-changes-4">Main Changes</h2>
<h2 id="main-changes-5">Main Changes</h2>
<ul>
<li><strong>Add Low Layer drivers allowing performance and footprint optimization</strong>
<ul>
@ -702,7 +733,7 @@ This software component is licensed by ST under BSD 3-Clause license, the “Lic
<div class="collapse">
<input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true"><strong>V1.0.5 / 06-December-2016</strong></label>
<div>
<h2 id="main-changes-5">Main Changes</h2>
<h2 id="main-changes-6">Main Changes</h2>
<ul>
<li>General updates to fix mainly known I2C defects and enhancements implementation</li>
<li><strong>The following changes done on the HAL drivers require an update on the application code based on HAL V1.0.4</strong>
@ -798,7 +829,7 @@ This software component is licensed by ST under BSD 3-Clause license, the “Lic
<div class="collapse">
<input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true"><strong>V1.0.4 / 29-April-2016</strong></label>
<div>
<h2 id="main-changes-6">Main Changes</h2>
<h2 id="main-changes-7">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation.</li>
<li><strong>HAL RCC</strong>
@ -838,7 +869,7 @@ This software component is licensed by ST under BSD 3-Clause license, the “Lic
<div class="collapse">
<input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"><strong>V1.0.3 / 11-January-2016</strong></label>
<div>
<h2 id="main-changes-7">Main Changes</h2>
<h2 id="main-changes-8">Main Changes</h2>
<ul>
<li>Remove the #if defined(USE_HAL_LEGACY) condition to include Legacy/stm32_hal_legacy.h by default, in stm32f1xx_hal_def.h.</li>
</ul>
@ -847,7 +878,7 @@ This software component is licensed by ST under BSD 3-Clause license, the “Lic
<div class="collapse">
<input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"><strong>V1.0.2 / 18-December-2015</strong></label>
<div>
<h2 id="main-changes-8">Main Changes</h2>
<h2 id="main-changes-9">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation.</li>
<li><strong>HAL generic</strong>
@ -933,7 +964,7 @@ This software component is licensed by ST under BSD 3-Clause license, the “Lic
<div class="collapse">
<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.0.1 / 31-July-2015</strong></label>
<div>
<h2 id="main-changes-9">Main Changes</h2>
<h2 id="main-changes-10">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation.</li>
<li><strong>HAL generic</strong>
@ -1035,7 +1066,7 @@ This software component is licensed by ST under BSD 3-Clause license, the “Lic
<div class="collapse">
<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 15-December-2014</strong></label>
<div>
<h2 id="main-changes-10">Main Changes</h2>
<h2 id="main-changes-11">Main Changes</h2>
<ul>
<li>First Official release of <strong>STM32F1xx HAL Drivers</strong> for all STM32F1 devices.</li>
<li>This release is in line with <strong>STM32Cube Firmware specification Rev1.0</strong> document</li>

18
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c
View File

@ -53,11 +53,11 @@
* @{
*/
/**
* @brief STM32F1xx HAL Driver version number V1.1.4
* @brief STM32F1xx HAL Driver version number V1.1.5
*/
#define __STM32F1xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
#define __STM32F1xx_HAL_VERSION_SUB1 (0x01U) /*!< [23:16] sub1 version */
#define __STM32F1xx_HAL_VERSION_SUB2 (0x04U) /*!< [15:8] sub2 version */
#define __STM32F1xx_HAL_VERSION_SUB2 (0x05U) /*!< [15:8] sub2 version */
#define __STM32F1xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
#define __STM32F1xx_HAL_VERSION ((__STM32F1xx_HAL_VERSION_MAIN << 24)\
|(__STM32F1xx_HAL_VERSION_SUB1 << 16)\
@ -322,15 +322,25 @@ uint32_t HAL_GetTickPrio(void)
HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq)
{
HAL_StatusTypeDef status = HAL_OK;
HAL_TickFreqTypeDef prevTickFreq;
assert_param(IS_TICKFREQ(Freq));
if (uwTickFreq != Freq)
{
/* Back up uwTickFreq frequency */
prevTickFreq = uwTickFreq;
/* Update uwTickFreq global variable used by HAL_InitTick() */
uwTickFreq = Freq;
/* Apply the new tick Freq */
status = HAL_InitTick(uwTickPrio);
if (status == HAL_OK)
if (status != HAL_OK)
{
uwTickFreq = Freq;
/* Restore previous tick frequency */
uwTickFreq = prevTickFreq;
}
}

48
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_hcd.c
View File

@ -88,8 +88,8 @@ static void HCD_Port_IRQHandler(HCD_HandleTypeDef *hhcd);
*/
/** @defgroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions
* @brief Initialization and Configuration functions
*
* @brief Initialization and Configuration functions
*
@verbatim
===============================================================================
##### Initialization and de-initialization functions #####
@ -595,6 +595,18 @@ void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd)
}
}
/**
* @brief Handles HCD Wakeup interrupt request.
* @param hhcd HCD handle
* @retval HAL status
*/
void HAL_HCD_WKUP_IRQHandler(HCD_HandleTypeDef *hhcd)
{
UNUSED(hhcd);
}
/**
* @brief SOF callback.
* @param hhcd HCD handle
@ -714,7 +726,9 @@ __weak void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, uint8_t
* @param pCallback pointer to the Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HCD_RegisterCallback(HCD_HandleTypeDef *hhcd, HAL_HCD_CallbackIDTypeDef CallbackID, pHCD_CallbackTypeDef pCallback)
HAL_StatusTypeDef HAL_HCD_RegisterCallback(HCD_HandleTypeDef *hhcd,
HAL_HCD_CallbackIDTypeDef CallbackID,
pHCD_CallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@ -802,7 +816,7 @@ HAL_StatusTypeDef HAL_HCD_RegisterCallback(HCD_HandleTypeDef *hhcd, HAL_HCD_Call
/**
* @brief Unregister an USB HCD Callback
* USB HCD callabck is redirected to the weak predefined callback
* USB HCD callback is redirected to the weak predefined callback
* @param hhcd USB HCD handle
* @param CallbackID ID of the callback to be unregistered
* This parameter can be one of the following values:
@ -906,7 +920,8 @@ HAL_StatusTypeDef HAL_HCD_UnRegisterCallback(HCD_HandleTypeDef *hhcd, HAL_HCD_Ca
* @param pCallback pointer to the USB HCD Host Channel Notify URB Change Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HCD_RegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd, pHCD_HC_NotifyURBChangeCallbackTypeDef pCallback)
HAL_StatusTypeDef HAL_HCD_RegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd,
pHCD_HC_NotifyURBChangeCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@ -941,7 +956,7 @@ HAL_StatusTypeDef HAL_HCD_RegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *
}
/**
* @brief UnRegister the USB HCD Host Channel Notify URB Change Callback
* @brief Unregister the USB HCD Host Channel Notify URB Change Callback
* USB HCD Host Channel Notify URB Change Callback is redirected to the weak HAL_HCD_HC_NotifyURBChange_Callback() predefined callback
* @param hhcd HCD handle
* @retval HAL status
@ -978,8 +993,8 @@ HAL_StatusTypeDef HAL_HCD_UnRegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef
*/
/** @defgroup HCD_Exported_Functions_Group3 Peripheral Control functions
* @brief Management functions
*
* @brief Management functions
*
@verbatim
===============================================================================
##### Peripheral Control functions #####
@ -1037,8 +1052,8 @@ HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd)
*/
/** @defgroup HCD_Exported_Functions_Group4 Peripheral State functions
* @brief Peripheral State functions
*
* @brief Peripheral State functions
*
@verbatim
===============================================================================
##### Peripheral State functions #####
@ -1166,6 +1181,13 @@ static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_AHBERR);
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
}
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_BBERR) == USB_OTG_HCINT_BBERR)
{
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_BBERR);
hhcd->hc[ch_num].state = HC_BBLERR;
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
}
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_ACK) == USB_OTG_HCINT_ACK)
{
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_ACK);
@ -1224,6 +1246,7 @@ static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
else if (hhcd->hc[ch_num].ep_type == EP_TYPE_ISOC)
{
hhcd->hc[ch_num].urb_state = URB_DONE;
hhcd->hc[ch_num].toggle_in ^= 1U;
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
hhcd->HC_NotifyURBChangeCallback(hhcd, (uint8_t)ch_num, hhcd->hc[ch_num].urb_state);
@ -1279,6 +1302,11 @@ static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
tmpreg |= USB_OTG_HCCHAR_CHENA;
USBx_HC(ch_num)->HCCHAR = tmpreg;
}
else if (hhcd->hc[ch_num].state == HC_BBLERR)
{
hhcd->hc[ch_num].ErrCnt++;
hhcd->hc[ch_num].urb_state = URB_ERROR;
}
else
{
/* ... */

521
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c
View File

@ -337,6 +337,7 @@
*/
#define I2C_TIMEOUT_FLAG 35U /*!< Timeout 35 ms */
#define I2C_TIMEOUT_BUSY_FLAG 25U /*!< Timeout 25 ms */
#define I2C_TIMEOUT_STOP_FLAG 5U /*!< Timeout 5 ms */
#define I2C_NO_OPTION_FRAME 0xFFFF0000U /*!< XferOptions default value */
/* Private define for @ref PreviousState usage */
@ -377,6 +378,7 @@ static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c,
static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
static HAL_StatusTypeDef I2C_WaitOnSTOPRequestThroughIT(I2C_HandleTypeDef *hi2c);
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
/* Private functions for I2C transfer IRQ handler */
@ -396,6 +398,8 @@ static void I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c, uint32_t IT2Flags);
static void I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
static void I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
static void I2C_MemoryTransmit_TXE_BTF(I2C_HandleTypeDef *hi2c);
/* Private function to Convert Specific options */
static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c);
/**
@ -504,6 +508,10 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
/* Disable the selected I2C peripheral */
__HAL_I2C_DISABLE(hi2c);
/*Reset I2C*/
hi2c->Instance->CR1 |= I2C_CR1_SWRST;
hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
/* Get PCLK1 frequency */
pclk1 = HAL_RCC_GetPCLK1Freq();
@ -1162,6 +1170,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA
*/
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
__IO uint32_t count = 0U;
/* Init tickstart for timeout management*/
uint32_t tickstart = HAL_GetTick();
@ -1344,10 +1354,27 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAd
hi2c->XferCount--;
/* Wait until BTF flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U);
do
{
return HAL_ERROR;
count--;
if (count == 0U)
{
hi2c->PreviousState = I2C_STATE_NONE;
hi2c->State = HAL_I2C_STATE_READY;
hi2c->Mode = HAL_I2C_MODE_NONE;
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
/* Re-enable IRQs */
__enable_irq();
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
return HAL_ERROR;
}
}
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET);
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
@ -2567,6 +2594,8 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress
*/
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
__IO uint32_t count = 0U;
/* Init tickstart for timeout management*/
uint32_t tickstart = HAL_GetTick();
@ -2751,10 +2780,27 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
hi2c->XferCount--;
/* Wait until BTF flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U);
do
{
return HAL_ERROR;
count--;
if (count == 0U)
{
hi2c->PreviousState = I2C_STATE_NONE;
hi2c->State = HAL_I2C_STATE_READY;
hi2c->Mode = HAL_I2C_MODE_NONE;
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
/* Re-enable IRQs */
__enable_irq();
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
return HAL_ERROR;
}
}
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET);
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
@ -3100,6 +3146,27 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAdd
/* Send Slave Address and Memory Address */
if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
{
/* Abort the ongoing DMA */
dmaxferstatus = HAL_DMA_Abort_IT(hi2c->hdmarx);
/* Prevent unused argument(s) compilation and MISRA warning */
UNUSED(dmaxferstatus);
/* Clear directly Complete callback as no XferAbortCallback is used to finalize Abort treatment */
if (hi2c->hdmatx != NULL)
{
hi2c->hdmatx->XferCpltCallback = NULL;
}
/* Disable Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
hi2c->XferSize = 0U;
hi2c->XferCount = 0U;
/* Disable I2C peripheral to prevent dummy data in buffer */
__HAL_I2C_DISABLE(hi2c);
return HAL_ERROR;
}
@ -3243,6 +3310,27 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddr
/* Send Slave Address and Memory Address */
if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
{
/* Abort the ongoing DMA */
dmaxferstatus = HAL_DMA_Abort_IT(hi2c->hdmarx);
/* Prevent unused argument(s) compilation and MISRA warning */
UNUSED(dmaxferstatus);
/* Clear directly Complete callback as no XferAbortCallback is used to finalize Abort treatment */
if (hi2c->hdmarx != NULL)
{
hi2c->hdmarx->XferCpltCallback = NULL;
}
/* Disable Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
hi2c->XferSize = 0U;
hi2c->XferCount = 0U;
/* Disable I2C peripheral to prevent dummy data in buffer */
__HAL_I2C_DISABLE(hi2c);
return HAL_ERROR;
}
@ -3367,7 +3455,11 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
{
return HAL_ERROR;
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
{
hi2c->ErrorCode = HAL_I2C_WRONG_START;
}
return HAL_TIMEOUT;
}
/* Send slave address */
@ -3469,7 +3561,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16
if (hi2c->State == HAL_I2C_STATE_READY)
{
/* Check Busy Flag only if FIRST call of Master interface */
if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
{
/* Wait until BUSY flag is reset */
count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
@ -3568,7 +3660,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1
if (hi2c->State == HAL_I2C_STATE_READY)
{
/* Check Busy Flag only if FIRST call of Master interface */
if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
{
/* Wait until BUSY flag is reset */
count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
@ -3734,7 +3826,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_
if (hi2c->State == HAL_I2C_STATE_READY)
{
/* Check Busy Flag only if FIRST call of Master interface */
if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
{
/* Wait until BUSY flag is reset */
count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
@ -3859,7 +3951,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16
if (hi2c->State == HAL_I2C_STATE_READY)
{
/* Check Busy Flag only if FIRST call of Master interface */
if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
{
/* Wait until BUSY flag is reset */
count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
@ -4561,11 +4653,14 @@ HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
*/
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
{
/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
/* Prevent unused argument(s) compilation warning */
UNUSED(DevAddress);
/* Abort Master transfer during Receive or Transmit process */
if (hi2c->Mode == HAL_I2C_MODE_MASTER)
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET) && (CurrentMode == HAL_I2C_MODE_MASTER))
{
/* Process Locked */
__HAL_LOCK(hi2c);
@ -4596,6 +4691,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevA
{
/* Wrong usage of abort function */
/* This function should be used only in case of abort monitored by master device */
/* Or periphal is not in busy state, mean there is no active sequence to be abort */
return HAL_ERROR;
}
}
@ -4667,7 +4763,14 @@ void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
/* BTF set -------------------------------------------------------------*/
else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
{
I2C_MasterTransmit_BTF(hi2c);
if (CurrentMode == HAL_I2C_MODE_MASTER)
{
I2C_MasterTransmit_BTF(hi2c);
}
else /* HAL_I2C_MODE_MEM */
{
I2C_MemoryTransmit_TXE_BTF(hi2c);
}
}
else
{
@ -4782,6 +4885,7 @@ void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
uint32_t itsources = READ_REG(hi2c->Instance->CR2);
uint32_t error = HAL_I2C_ERROR_NONE;
HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
/* I2C Bus error interrupt occurred ----------------------------------------*/
if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BERR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
@ -4807,7 +4911,7 @@ void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
/* I2C Acknowledge failure error interrupt occurred ------------------------*/
if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
{
tmp1 = hi2c->Mode;
tmp1 = CurrentMode;
tmp2 = hi2c->XferCount;
tmp3 = hi2c->State;
tmp4 = hi2c->PreviousState;
@ -4825,7 +4929,7 @@ void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
error |= HAL_I2C_ERROR_AF;
/* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */
if (hi2c->Mode == HAL_I2C_MODE_MASTER)
if ((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM))
{
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
@ -5150,59 +5254,7 @@ static void I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
{
if (hi2c->Mode == HAL_I2C_MODE_MEM)
{
if (hi2c->EventCount == 0U)
{
/* If Memory address size is 8Bit */
if (hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
{
/* Send Memory Address */
hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
hi2c->EventCount += 2U;
}
/* If Memory address size is 16Bit */
else
{
/* Send MSB of Memory Address */
hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
hi2c->EventCount++;
}
}
else if (hi2c->EventCount == 1U)
{
/* Send LSB of Memory Address */
hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
hi2c->EventCount++;
}
else if (hi2c->EventCount == 2U)
{
if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
{
/* Generate Restart */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
else if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
{
/* Write data to DR */
hi2c->Instance->DR = *hi2c->pBuffPtr;
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
/* Update counter */
hi2c->XferCount--;
}
else
{
/* Do nothing */
}
}
else
{
/* Do nothing */
}
I2C_MemoryTransmit_TXE_BTF(hi2c);
}
else
{
@ -5274,29 +5326,104 @@ static void I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
hi2c->PreviousState = I2C_STATE_NONE;
hi2c->State = HAL_I2C_STATE_READY;
if (hi2c->Mode == HAL_I2C_MODE_MEM)
{
hi2c->Mode = HAL_I2C_MODE_NONE;
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
hi2c->MemTxCpltCallback(hi2c);
#else
HAL_I2C_MemTxCpltCallback(hi2c);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
else
{
hi2c->Mode = HAL_I2C_MODE_NONE;
hi2c->Mode = HAL_I2C_MODE_NONE;
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
hi2c->MasterTxCpltCallback(hi2c);
hi2c->MasterTxCpltCallback(hi2c);
#else
HAL_I2C_MasterTxCpltCallback(hi2c);
HAL_I2C_MasterTxCpltCallback(hi2c);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
}
}
}
else
{
/* Do nothing */
}
}
/**
* @brief Handle TXE and BTF flag for Memory transmitter
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for I2C module
* @retval None
*/
static void I2C_MemoryTransmit_TXE_BTF(I2C_HandleTypeDef *hi2c)
{
/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
HAL_I2C_StateTypeDef CurrentState = hi2c->State;
if (hi2c->EventCount == 0U)
{
/* If Memory address size is 8Bit */
if (hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
{
/* Send Memory Address */
hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
hi2c->EventCount += 2U;
}
/* If Memory address size is 16Bit */
else
{
/* Send MSB of Memory Address */
hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
hi2c->EventCount++;
}
}
else if (hi2c->EventCount == 1U)
{
/* Send LSB of Memory Address */
hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
hi2c->EventCount++;
}
else if (hi2c->EventCount == 2U)
{
if (CurrentState == HAL_I2C_STATE_BUSY_RX)
{
/* Generate Restart */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
else if ((hi2c->XferCount > 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
{
/* Write data to DR */
hi2c->Instance->DR = *hi2c->pBuffPtr;
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
/* Update counter */
hi2c->XferCount--;
}
else if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
{
/* Generate Stop condition then Call TxCpltCallback() */
/* Disable EVT, BUF and ERR interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
hi2c->PreviousState = I2C_STATE_NONE;
hi2c->State = HAL_I2C_STATE_READY;
hi2c->Mode = HAL_I2C_MODE_NONE;
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
hi2c->MemTxCpltCallback(hi2c);
#else
HAL_I2C_MemTxCpltCallback(hi2c);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
else
{
/* Do nothing */
}
}
else
{
/* Do nothing */
}
}
/**
@ -5333,43 +5460,70 @@ static void I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
}
else if ((hi2c->XferOptions != I2C_FIRST_AND_NEXT_FRAME) && ((tmp == 1U) || (tmp == 0U)))
{
/* Disable Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
/* Disable EVT, BUF and ERR interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
/* Update counter */
hi2c->XferCount--;
hi2c->State = HAL_I2C_STATE_READY;
if (hi2c->Mode == HAL_I2C_MODE_MEM)
if (I2C_WaitOnSTOPRequestThroughIT(hi2c) == HAL_OK)
{
hi2c->Mode = HAL_I2C_MODE_NONE;
hi2c->PreviousState = I2C_STATE_NONE;
/* Disable Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
/* Disable EVT, BUF and ERR interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
/* Update counter */
hi2c->XferCount--;
hi2c->State = HAL_I2C_STATE_READY;
if (hi2c->Mode == HAL_I2C_MODE_MEM)
{
hi2c->Mode = HAL_I2C_MODE_NONE;
hi2c->PreviousState = I2C_STATE_NONE;
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
hi2c->MemRxCpltCallback(hi2c);
hi2c->MemRxCpltCallback(hi2c);
#else
HAL_I2C_MemRxCpltCallback(hi2c);
HAL_I2C_MemRxCpltCallback(hi2c);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
else
{
hi2c->Mode = HAL_I2C_MODE_NONE;
hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
hi2c->MasterRxCpltCallback(hi2c);
#else
HAL_I2C_MasterRxCpltCallback(hi2c);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
}
else
{
hi2c->Mode = HAL_I2C_MODE_NONE;
hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
/* Disable EVT, BUF and ERR interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
/* Update counter */
hi2c->XferCount--;
hi2c->State = HAL_I2C_STATE_READY;
hi2c->Mode = HAL_I2C_MODE_NONE;
/* Call user error callback */
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
hi2c->MasterRxCpltCallback(hi2c);
hi2c->ErrorCallback(hi2c);
#else
HAL_I2C_MasterRxCpltCallback(hi2c);
HAL_I2C_ErrorCallback(hi2c);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
}
@ -5540,13 +5694,11 @@ static void I2C_Master_SB(I2C_HandleTypeDef *hi2c)
hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
}
if ((hi2c->hdmatx != NULL) || (hi2c->hdmarx != NULL))
if (((hi2c->hdmatx != NULL) && (hi2c->hdmatx->XferCpltCallback != NULL))
|| ((hi2c->hdmarx != NULL) && (hi2c->hdmarx->XferCpltCallback != NULL)))
{
if ((hi2c->hdmatx->XferCpltCallback != NULL) || (hi2c->hdmarx->XferCpltCallback != NULL))
{
/* Enable DMA Request */
SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
}
/* Enable DMA Request */
SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
}
}
else
@ -6159,8 +6311,10 @@ static void I2C_ITError(I2C_HandleTypeDef *hi2c)
{
/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
HAL_I2C_StateTypeDef CurrentState = hi2c->State;
HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
uint32_t CurrentError;
if ((hi2c->Mode == HAL_I2C_MODE_MASTER) && (CurrentState == HAL_I2C_STATE_BUSY_RX))
if (((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM)) && (CurrentState == HAL_I2C_STATE_BUSY_RX))
{
/* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
hi2c->Instance->CR1 &= ~I2C_CR1_POS;
@ -6179,9 +6333,9 @@ static void I2C_ITError(I2C_HandleTypeDef *hi2c)
if ((READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) != I2C_CR2_DMAEN) && (CurrentState != HAL_I2C_STATE_ABORT))
{
hi2c->State = HAL_I2C_STATE_READY;
hi2c->Mode = HAL_I2C_MODE_NONE;
}
hi2c->PreviousState = I2C_STATE_NONE;
hi2c->Mode = HAL_I2C_MODE_NONE;
}
/* Abort DMA transfer */
@ -6278,15 +6432,24 @@ static void I2C_ITError(I2C_HandleTypeDef *hi2c)
HAL_I2C_ErrorCallback(hi2c);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
/* STOP Flag is not set after a NACK reception */
/* STOP Flag is not set after a NACK reception, BusError, ArbitrationLost, OverRun */
CurrentError = hi2c->ErrorCode;
if (((CurrentError & HAL_I2C_ERROR_BERR) == HAL_I2C_ERROR_BERR) || \
((CurrentError & HAL_I2C_ERROR_ARLO) == HAL_I2C_ERROR_ARLO) || \
((CurrentError & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF) || \
((CurrentError & HAL_I2C_ERROR_OVR) == HAL_I2C_ERROR_OVR))
{
/* Disable EVT, BUF and ERR interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
}
/* So may inform upper layer that listen phase is stopped */
/* during NACK error treatment */
CurrentState = hi2c->State;
if (((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF) && (CurrentState == HAL_I2C_STATE_LISTEN))
{
/* Disable EVT, BUF and ERR interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
hi2c->PreviousState = I2C_STATE_NONE;
hi2c->State = HAL_I2C_STATE_READY;
@ -6334,7 +6497,11 @@ static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
return HAL_ERROR;
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
{
hi2c->ErrorCode = HAL_I2C_WRONG_START;
}
return HAL_TIMEOUT;
}
if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
@ -6403,7 +6570,11 @@ static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
return HAL_ERROR;
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
{
hi2c->ErrorCode = HAL_I2C_WRONG_START;
}
return HAL_TIMEOUT;
}
if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
@ -6440,7 +6611,11 @@ static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
return HAL_ERROR;
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
{
hi2c->ErrorCode = HAL_I2C_WRONG_START;
}
return HAL_TIMEOUT;
}
/* Send header of slave address */
@ -6476,7 +6651,11 @@ static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
return HAL_ERROR;
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
{
hi2c->ErrorCode = HAL_I2C_WRONG_START;
}
return HAL_TIMEOUT;
}
/* Send slave address */
@ -6555,7 +6734,11 @@ static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
return HAL_ERROR;
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
{
hi2c->ErrorCode = HAL_I2C_WRONG_START;
}
return HAL_TIMEOUT;
}
/* Send slave address */
@ -6625,7 +6808,11 @@ static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
return HAL_ERROR;
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
{
hi2c->ErrorCode = HAL_I2C_WRONG_START;
}
return HAL_TIMEOUT;
}
/* Send slave address */
@ -6658,8 +6845,14 @@ static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma)
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
/* Clear Complete callback */
hi2c->hdmatx->XferCpltCallback = NULL;
hi2c->hdmarx->XferCpltCallback = NULL;
if (hi2c->hdmatx != NULL)
{
hi2c->hdmatx->XferCpltCallback = NULL;
}
if (hi2c->hdmarx != NULL)
{
hi2c->hdmarx->XferCpltCallback = NULL;
}
if ((((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_BUSY_TX) == (uint32_t)HAL_I2C_STATE_BUSY_TX) || ((((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_BUSY_RX) == (uint32_t)HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE)))
{
@ -6782,8 +6975,14 @@ static void I2C_DMAError(DMA_HandleTypeDef *hdma)
I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
/* Clear Complete callback */
hi2c->hdmatx->XferCpltCallback = NULL;
hi2c->hdmarx->XferCpltCallback = NULL;
if (hi2c->hdmatx != NULL)
{
hi2c->hdmatx->XferCpltCallback = NULL;
}
if (hi2c->hdmarx != NULL)
{
hi2c->hdmarx->XferCpltCallback = NULL;
}
/* Disable Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
@ -6808,14 +7007,35 @@ static void I2C_DMAError(DMA_HandleTypeDef *hdma)
*/
static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
{
__IO uint32_t count = 0U;
I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
HAL_I2C_StateTypeDef CurrentState = hi2c->State;
/* During abort treatment, check that there is no pending STOP request */
/* Wait until STOP flag is reset */
count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U);
do
{
if (count == 0U)
{
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
break;
}
count--;
}
while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP);
/* Clear Complete callback */
hi2c->hdmatx->XferCpltCallback = NULL;
hi2c->hdmarx->XferCpltCallback = NULL;
if (hi2c->hdmatx != NULL)
{
hi2c->hdmatx->XferCpltCallback = NULL;
}
if (hi2c->hdmarx != NULL)
{
hi2c->hdmarx->XferCpltCallback = NULL;
}
/* Disable Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
@ -6823,8 +7043,14 @@ static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
hi2c->XferCount = 0U;
/* Reset XferAbortCallback */
hi2c->hdmatx->XferAbortCallback = NULL;
hi2c->hdmarx->XferAbortCallback = NULL;
if (hi2c->hdmatx != NULL)
{
hi2c->hdmatx->XferAbortCallback = NULL;
}
if (hi2c->hdmarx != NULL)
{
hi2c->hdmarx->XferAbortCallback = NULL;
}
/* Disable I2C peripheral to prevent dummy data in buffer */
__HAL_I2C_DISABLE(hi2c);
@ -7070,6 +7296,33 @@ static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c,
return HAL_OK;
}
/**
* @brief This function handles I2C Communication Timeout for specific usage of STOP request through Interrupt.
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for the specified I2C.
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_WaitOnSTOPRequestThroughIT(I2C_HandleTypeDef *hi2c)
{
__IO uint32_t count = 0U;
/* Wait until STOP flag is reset */
count = I2C_TIMEOUT_STOP_FLAG * (SystemCoreClock / 25U / 1000U);
do
{
count--;
if (count == 0U)
{
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
return HAL_ERROR;
}
}
while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP);
return HAL_OK;
}
/**
* @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains

579
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.c
View File

@ -94,6 +94,8 @@ static HAL_StatusTypeDef PCD_EP_OutSetupPacket_int(PCD_HandleTypeDef *hpcd, uint
#if defined (USB)
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd);
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal);
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal);
#endif /* defined (USB) */
/**
* @}
@ -105,8 +107,8 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd);
*/
/** @defgroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
* @brief Initialization and Configuration functions
*
* @brief Initialization and Configuration functions
*
@verbatim
===============================================================================
##### Initialization and de-initialization functions #####
@ -252,7 +254,10 @@ HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd)
hpcd->State = HAL_PCD_STATE_BUSY;
/* Stop Device */
(void)HAL_PCD_Stop(hpcd);
if (USB_StopDevice(hpcd->Instance) != HAL_OK)
{
return HAL_ERROR;
}
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
if (hpcd->MspDeInitCallback == NULL)
@ -321,7 +326,9 @@ __weak void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd)
* @param pCallback pointer to the Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback)
HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd,
HAL_PCD_CallbackIDTypeDef CallbackID,
pPCD_CallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@ -531,7 +538,8 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_Ca
* @param pCallback pointer to the USB PCD Data OUT Stage Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback)
HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
pPCD_DataOutStageCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@ -566,7 +574,7 @@ HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
}
/**
* @brief UnRegister the USB PCD Data OUT Stage Callback
* @brief Unregister the USB PCD Data OUT Stage Callback
* USB PCD Data OUT Stage Callback is redirected to the weak HAL_PCD_DataOutStageCallback() predefined callback
* @param hpcd PCD handle
* @retval HAL status
@ -604,7 +612,8 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd
* @param pCallback pointer to the USB PCD Data IN Stage Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback)
HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
pPCD_DataInStageCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@ -639,7 +648,7 @@ HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, p
}
/**
* @brief UnRegister the USB PCD Data IN Stage Callback
* @brief Unregister the USB PCD Data IN Stage Callback
* USB PCD Data OUT Stage Callback is redirected to the weak HAL_PCD_DataInStageCallback() predefined callback
* @param hpcd PCD handle
* @retval HAL status
@ -677,7 +686,8 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd)
* @param pCallback pointer to the USB PCD Iso OUT incomplete Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback)
HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
pPCD_IsoOutIncpltCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@ -712,7 +722,7 @@ HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
}
/**
* @brief UnRegister the USB PCD Iso OUT incomplete Callback
* @brief Unregister the USB PCD Iso OUT incomplete Callback
* USB PCD Iso OUT incomplete Callback is redirected to the weak HAL_PCD_ISOOUTIncompleteCallback() predefined callback
* @param hpcd PCD handle
* @retval HAL status
@ -750,7 +760,8 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd
* @param pCallback pointer to the USB PCD Iso IN incomplete Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback)
HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
pPCD_IsoInIncpltCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@ -785,7 +796,7 @@ HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, p
}
/**
* @brief UnRegister the USB PCD Iso IN incomplete Callback
* @brief Unregister the USB PCD Iso IN incomplete Callback
* USB PCD Iso IN incomplete Callback is redirected to the weak HAL_PCD_ISOINIncompleteCallback() predefined callback
* @param hpcd PCD handle
* @retval HAL status
@ -823,8 +834,8 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd)
*/
/** @defgroup PCD_Exported_Functions_Group2 Input and Output operation functions
* @brief Data transfers functions
*
* @brief Data transfers functions
*
@verbatim
===============================================================================
##### IO operation functions #####
@ -845,12 +856,15 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd)
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
__HAL_LOCK(hpcd);
__HAL_PCD_ENABLE(hpcd);
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
#endif /* defined (USB) */
(void)USB_DevConnect(hpcd->Instance);
__HAL_PCD_ENABLE(hpcd);
__HAL_UNLOCK(hpcd);
return HAL_OK;
}
@ -864,17 +878,21 @@ HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd)
__HAL_LOCK(hpcd);
__HAL_PCD_DISABLE(hpcd);
if (USB_StopDevice(hpcd->Instance) != HAL_OK)
{
__HAL_UNLOCK(hpcd);
return HAL_ERROR;
}
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 0U);
#endif /* defined (USB) */
(void)USB_DevDisconnect(hpcd->Instance);
#if defined (USB_OTG_FS)
(void)USB_FlushTxFifo(hpcd->Instance, 0x10U);
#endif /* defined (USB_OTG_FS) */
__HAL_UNLOCK(hpcd);
return HAL_OK;
}
#if defined (USB_OTG_FS)
/**
* @brief Handles PCD interrupt request.
@ -904,6 +922,38 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_MMIS);
}
/* Handle RxQLevel Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL))
{
USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
temp = USBx->GRXSTSP;
ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM];
if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT)
{
if ((temp & USB_OTG_GRXSTSP_BCNT) != 0U)
{
(void)USB_ReadPacket(USBx, ep->xfer_buff,
(uint16_t)((temp & USB_OTG_GRXSTSP_BCNT) >> 4));
ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
}
}
else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT)
{
(void)USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U);
ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
}
else
{
/* ... */
}
USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_OEPINT))
{
epnum = 0U;
@ -925,9 +975,9 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
if ((epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP)
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STUP);
/* Class B setup phase done for previous decoded setup */
(void)PCD_EP_OutSetupPacket_int(hpcd, epnum);
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STUP);
}
if ((epint & USB_OTG_DOEPINT_OTEPDIS) == USB_OTG_DOEPINT_OTEPDIS)
@ -1042,8 +1092,10 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
USBx_INEP(i)->DIEPINT = 0xFB7FU;
USBx_INEP(i)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL;
USBx_INEP(i)->DIEPCTL |= USB_OTG_DIEPCTL_SNAK;
USBx_OUTEP(i)->DOEPINT = 0xFB7FU;
USBx_OUTEP(i)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL;
USBx_OUTEP(i)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK;
}
USBx_DEVICE->DAINTMSK |= 0x10001U;
@ -1099,38 +1151,6 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_ENUMDNE);
}
/* Handle RxQLevel Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL))
{
USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
temp = USBx->GRXSTSP;
ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM];
if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT)
{
if ((temp & USB_OTG_GRXSTSP_BCNT) != 0U)
{
(void)USB_ReadPacket(USBx, ep->xfer_buff,
(uint16_t)((temp & USB_OTG_GRXSTSP_BCNT) >> 4));
ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
}
}
else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT)
{
(void)USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U);
ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
}
else
{
/* ... */
}
USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
}
/* Handle SOF Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_SOF))
{
@ -1204,6 +1224,18 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
}
}
}
/**
* @brief Handles PCD Wakeup interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd)
{
/* Clear EXTI pending Bit */
__HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG();
}
#endif /* defined (USB_OTG_FS) */
#if defined (USB)
@ -1214,6 +1246,9 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
uint16_t store_ep[8];
uint8_t i;
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_CTR))
{
/* servicing of the endpoint correct transfer interrupt */
@ -1260,19 +1295,41 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SUSP))
{
/* WA: To Clear Wakeup flag if raised with suspend signal */
/* Store Endpoint register */
for (i = 0U; i < 8U; i++)
{
store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
}
/* FORCE RESET */
hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
/* CLEAR RESET */
hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
/* wait for reset flag in ISTR */
while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
{
}
/* Clear Reset Flag */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
/* Restore Registre */
for (i = 0U; i < 8U; i++)
{
PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
}
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= USB_CNTR_FSUSP;
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
hpcd->Instance->CNTR |= USB_CNTR_LP_MODE;
/* WA: Clear Wakeup flag if raised with suspend signal */
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_WKUP))
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
}
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
@ -1298,6 +1355,18 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
}
}
/**
* @brief Handles PCD Wakeup interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd)
{
/* Clear EXTI pending Bit */
__HAL_USB_WAKEUP_EXTI_CLEAR_FLAG();
}
#endif /* defined (USB) */
/**
@ -1477,8 +1546,8 @@ __weak void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
*/
/** @defgroup PCD_Exported_Functions_Group3 Peripheral Control functions
* @brief management functions
*
* @brief management functions
*
@verbatim
===============================================================================
##### Peripheral Control functions #####
@ -1499,11 +1568,14 @@ __weak void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd)
{
__HAL_LOCK(hpcd);
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
#endif /* defined (USB) */
(void)USB_DevConnect(hpcd->Instance);
__HAL_UNLOCK(hpcd);
return HAL_OK;
}
@ -1515,11 +1587,14 @@ HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd)
HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd)
{
__HAL_LOCK(hpcd);
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 0U);
#endif /* defined (USB) */
(void)USB_DevDisconnect(hpcd->Instance);
__HAL_UNLOCK(hpcd);
return HAL_OK;
}
@ -1535,6 +1610,7 @@ HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
hpcd->USB_Address = address;
(void)USB_SetDevAddress(hpcd->Instance, address);
__HAL_UNLOCK(hpcd);
return HAL_OK;
}
/**
@ -1545,7 +1621,8 @@ HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type)
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
HAL_StatusTypeDef ret = HAL_OK;
PCD_EPTypeDef *ep;
@ -1672,6 +1749,10 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
ep->xfer_len = len;
#if defined (USB)
ep->xfer_fill_db = 1U;
ep->xfer_len_db = len;
#endif /* defined (USB) */
ep->xfer_count = 0U;
ep->is_in = 1U;
ep->num = ep_addr & EP_ADDR_MSK;
@ -1720,10 +1801,12 @@ HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
__HAL_LOCK(hpcd);
(void)USB_EPSetStall(hpcd->Instance, ep);
if ((ep_addr & EP_ADDR_MSK) == 0U)
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
}
__HAL_UNLOCK(hpcd);
return HAL_OK;
@ -1814,8 +1897,8 @@ HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd)
*/
/** @defgroup PCD_Exported_Functions_Group4 Peripheral State functions
* @brief Peripheral State functions
*
* @brief Peripheral State functions
*
@verbatim
===============================================================================
##### Peripheral State functions #####
@ -1970,8 +2053,7 @@ static HAL_StatusTypeDef PCD_EP_OutSetupPacket_int(PCD_HandleTypeDef *hpcd, uint
uint32_t gSNPSiD = *(__IO uint32_t *)(&USBx->CID + 0x1U);
uint32_t DoepintReg = USBx_OUTEP(epnum)->DOEPINT;
if ((gSNPSiD == USB_OTG_CORE_ID_310A) &&
if ((gSNPSiD > USB_OTG_CORE_ID_300A) &&
((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX))
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX);
@ -1997,15 +2079,14 @@ static HAL_StatusTypeDef PCD_EP_OutSetupPacket_int(PCD_HandleTypeDef *hpcd, uint
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
PCD_EPTypeDef *ep;
uint16_t count;
uint16_t wIstr;
uint16_t wEPVal;
uint16_t count, wIstr, wEPVal, TxByteNbre;
uint8_t epindex;
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
{
wIstr = hpcd->Instance->ISTR;
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
@ -2018,8 +2099,8 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
/* DIR = 0 */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
ep = &hpcd->IN_ep[0];
@ -2043,20 +2124,20 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
/* DIR = 1 */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
if ((wEPVal & USB_EP_SETUP) != 0U)
{
/* Get SETUP Packet*/
/* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
ep->pmaadress, (uint16_t)ep->xfer_count);
/* SETUP bit kept frozen while CTR_RX = 1*/
/* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
/* Process SETUP Packet*/
@ -2066,12 +2147,11 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
HAL_PCD_SetupStageCallback(hpcd);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
/* Get Control Data OUT Packet*/
/* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
@ -2081,7 +2161,7 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
ep->xfer_buff += ep->xfer_count;
/* Process Control Data OUT Packet*/
/* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
@ -2096,20 +2176,21 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
}
else
{
/* Decode and service non control endpoints interrupt */
/* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
if ((wEPVal & USB_EP_CTR_RX) != 0U)
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
ep = &hpcd->OUT_ep[epindex];
/* OUT double Buffering*/
/* OUT Single Buffering */
if (ep->doublebuffer == 0U)
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
if (count != 0U)
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
@ -2117,28 +2198,39 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
}
else
{
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
/* manage double buffer bulk out */
if (ep->type == EP_TYPE_BULK)
{
/*read from endpoint BUF0Addr buffer*/
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
if (count != 0U)
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
}
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
/* read from endpoint BUF0Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
if (count != 0U)
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
}
}
else
{
/* read from endpoint BUF1Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
if (count != 0U)
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
}
}
}
else
{
/*read from endpoint BUF1Addr buffer*/
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
if (count != 0U)
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
}
}
/* free EP OUT Buffer */
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
}
/*multi-packet on the NON control OUT endpoint*/
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
ep->xfer_buff += count;
@ -2153,10 +2245,10 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
}
else
{
(void)HAL_PCD_EP_Receive(hpcd, ep->num, ep->xfer_buff, ep->xfer_len);
(void) USB_EPStartXfer(hpcd->Instance, ep);
}
} /* if((wEPVal & EP_CTR_RX) */
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
{
@ -2165,29 +2257,294 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
/*multi-packet on the NON control IN endpoint*/
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
ep->xfer_buff += ep->xfer_count;
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
/* Manage all non bulk transaction or Bulk Single Buffer Transaction */
if ((ep->type != EP_TYPE_BULK) ||
((ep->type == EP_TYPE_BULK) && ((wEPVal & USB_EP_KIND) == 0U)))
{
/* TX COMPLETE */
/* multi-packet on the NON control IN endpoint */
TxByteNbre = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
if (ep->xfer_len > TxByteNbre)
{
ep->xfer_len -= TxByteNbre;
}
else
{
ep->xfer_len = 0U;
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
HAL_PCD_DataInStageCallback(hpcd, ep->num);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxByteNbre;
ep->xfer_count += TxByteNbre;
(void)USB_EPStartXfer(hpcd->Instance, ep);
}
}
/* bulk in double buffer enable in case of transferLen> Ep_Mps */
else
{
(void)HAL_PCD_EP_Transmit(hpcd, ep->num, ep->xfer_buff, ep->xfer_len);
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
}
}
}
}
return HAL_OK;
}
/**
* @brief Manage double buffer bulk out transaction from ISR
* @param hpcd PCD handle
* @param ep current endpoint handle
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
uint16_t count;
/* Manage Buffer0 OUT */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
{
/* Get count of received Data on buffer0 */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
if (ep->xfer_len >= count)
{
ep->xfer_len -= count;
}
else
{
ep->xfer_len = 0U;
}
if (ep->xfer_len == 0U)
{
/* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
}
/* Check if Buffer1 is in blocked sate which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
}
if (count != 0U)
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
}
}
/* Manage Buffer 1 DTOG_RX=0 */
else
{
/* Get count of received data */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
if (ep->xfer_len >= count)
{
ep->xfer_len -= count;
}
else
{
ep->xfer_len = 0U;
}
if (ep->xfer_len == 0U)
{
/* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
}
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
}
if (count != 0U)
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
}
}
return count;
}
/**
* @brief Manage double buffer bulk IN transaction from ISR
* @param hpcd PCD handle
* @param ep current endpoint handle
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
uint32_t len;
uint16_t TxByteNbre;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
{
/* multi-packet on the NON control IN endpoint */
TxByteNbre = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
if (ep->xfer_len > TxByteNbre)
{
ep->xfer_len -= TxByteNbre;
}
else
{
ep->xfer_len = 0U;
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
{
ep->xfer_buff += TxByteNbre;
ep->xfer_count += TxByteNbre;
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
{
len = ep->maxpacket;
ep->xfer_len_db -= len;
}
else if (ep->xfer_len_db == 0U)
{
len = TxByteNbre;
ep->xfer_fill_db = 0U;
}
else
{
ep->xfer_fill_db = 0U;
len = ep->xfer_len_db;
ep->xfer_len_db = 0U;
}
/* Write remaining Data to Buffer */
/* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
/* Copy user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
}
}
}
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxByteNbre = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
if (ep->xfer_len >= TxByteNbre)
{
ep->xfer_len -= TxByteNbre;
}
else
{
ep->xfer_len = 0U;
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/*need to Free USB Buff*/
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
{
ep->xfer_buff += TxByteNbre;
ep->xfer_count += TxByteNbre;
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
{
len = ep->maxpacket;
ep->xfer_len_db -= len;
}
else if (ep->xfer_len_db == 0U)
{
len = TxByteNbre;
ep->xfer_fill_db = 0U;
}
else
{
len = ep->xfer_len_db;
ep->xfer_len_db = 0U;
ep->xfer_fill_db = 0;
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
/* Copy the user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
}
}
}
/*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
return HAL_OK;
}
#endif /* defined (USB) */
/**

12
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.c
View File

@ -49,7 +49,7 @@
/** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions
* @brief PCDEx control functions
*
*
@verbatim
===============================================================================
##### Extended features functions #####
@ -135,10 +135,8 @@ HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size)
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd,
uint16_t ep_addr,
uint16_t ep_kind,
uint32_t pmaadress)
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress)
{
PCD_EPTypeDef *ep;
@ -176,8 +174,8 @@ HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd,
* @brief Software Device Connection,
* this function is not required by USB OTG FS peripheral, it is used
* only by USB Device FS peripheral.
* @param hpcd: PCD handle
* @param state: connection state (0 : disconnected / 1: connected)
* @param hpcd PCD handle
* @param state connection state (0 : disconnected / 1: connected)
* @retval None
*/
__weak void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)

137
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_timebase_rtc_alarm_template.c
View File

@ -89,6 +89,7 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
HAL_StatusTypeDef status;
#ifdef RTC_CLOCK_SOURCE_LSE
/* Configue LSE as RTC clock soucre */
@ -111,76 +112,94 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
#else
#error Please select the RTC Clock source
#endif /* RTC_CLOCK_SOURCE_LSE */
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK)
status = HAL_RCC_OscConfig(&RCC_OscInitStruct);
if (status == HAL_OK)
{
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) == HAL_OK)
status = HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
if (status == HAL_OK)
{
/* Enable RTC Clock */
__HAL_RCC_RTC_ENABLE();
hRTC_Handle.Instance = RTC;
/* Configure RTC time base to 10Khz */
hRTC_Handle.Instance = RTC;
hRTC_Handle.Init.AsynchPrediv = (HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_RTC) / 10000) - 1;
hRTC_Handle.Init.OutPut = RTC_OUTPUTSOURCE_NONE;
HAL_RTC_Init(&hRTC_Handle);
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(&hRTC_Handle);
/* Clear flag alarm A */
__HAL_RTC_ALARM_CLEAR_FLAG(&hRTC_Handle, RTC_FLAG_ALRAF);
counter = 0U;
/* Wait till RTC ALRAF flag is set and if Time out is reached exit */
while (__HAL_RTC_ALARM_GET_FLAG(&hRTC_Handle, RTC_FLAG_ALRAF) != RESET)
{
if (counter++ == SystemCoreClock / 48U) /* Timeout = ~ 1s */
{
return HAL_ERROR;
}
}
/* Set RTC COUNTER MSB word */
hRTC_Handle.Instance->ALRH = 0x00U;
/* Set RTC COUNTER LSB word */
hRTC_Handle.Instance->ALRL = 0x09U;
/* RTC Alarm Interrupt Configuration: EXTI configuration */
__HAL_RTC_ALARM_EXTI_ENABLE_IT();
__HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE();
/* Clear Second and overflow flags */
CLEAR_BIT(hRTC_Handle.Instance->CRL, (RTC_FLAG_SEC | RTC_FLAG_OW));
/* Set RTC COUNTER MSB word */
hRTC_Handle.Instance->CNTH = 0x00U;
/* Set RTC COUNTER LSB word */
hRTC_Handle.Instance->CNTL = 0x00U;
/* Configure the Alarm interrupt */
__HAL_RTC_ALARM_ENABLE_IT(&hRTC_Handle, RTC_IT_ALRA);
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(&hRTC_Handle);
/* Wait till RTC is in INIT state and if Time out is reached exit */
counter = 0U;
while ((hRTC_Handle.Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET)
{
if (counter++ == SystemCoreClock / 48U) /* Timeout = ~ 1s */
{
return HAL_ERROR;
}
}
HAL_NVIC_SetPriority(RTC_Alarm_IRQn, TickPriority, 0U);
HAL_NVIC_EnableIRQ(RTC_Alarm_IRQn);
return HAL_OK;
status = HAL_RTC_Init(&hRTC_Handle);
}
}
return HAL_ERROR;
if (status == HAL_OK)
{
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(&hRTC_Handle);
/* Clear flag alarm A */
__HAL_RTC_ALARM_CLEAR_FLAG(&hRTC_Handle, RTC_FLAG_ALRAF);
counter = 0U;
/* Wait till RTC ALRAF flag is set and if Time out is reached exit */
while (__HAL_RTC_ALARM_GET_FLAG(&hRTC_Handle, RTC_FLAG_ALRAF) != RESET)
{
if (counter++ == SystemCoreClock / 48U) /* Timeout = ~ 1s */
{
status = HAL_ERROR;
}
}
}
if (status == HAL_OK)
{
/* Set RTC COUNTER MSB word */
hRTC_Handle.Instance->ALRH = 0x00U;
/* Set RTC COUNTER LSB word */
hRTC_Handle.Instance->ALRL = 0x09U;
/* RTC Alarm Interrupt Configuration: EXTI configuration */
__HAL_RTC_ALARM_EXTI_ENABLE_IT();
__HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE();
/* Clear Second and overflow flags */
CLEAR_BIT(hRTC_Handle.Instance->CRL, (RTC_FLAG_SEC | RTC_FLAG_OW));
/* Set RTC COUNTER MSB word */
hRTC_Handle.Instance->CNTH = 0x00U;
/* Set RTC COUNTER LSB word */
hRTC_Handle.Instance->CNTL = 0x00U;
/* Configure the Alarm interrupt */
__HAL_RTC_ALARM_ENABLE_IT(&hRTC_Handle, RTC_IT_ALRA);
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(&hRTC_Handle);
/* Wait till RTC is in INIT state and if Time out is reached exit */
counter = 0U;
while ((hRTC_Handle.Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET)
{
if (counter++ == SystemCoreClock / 48U) /* Timeout = ~ 1s */
{
status = HAL_ERROR;
}
}
}
if (status == HAL_OK)
{
/* Enable the RTC global Interrupt */
HAL_NVIC_EnableIRQ(RTC_Alarm_IRQn);
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
{
HAL_NVIC_SetPriority(RTC_Alarm_IRQn, TickPriority ,0U);
uwTickPrio = TickPriority;
}
else
{
status = HAL_ERROR;
}
}
return status;
}
/**

29
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_timebase_tim_template.c
View File

@ -58,12 +58,8 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
uint32_t uwTimclock, uwAPB1Prescaler = 0U;
uint32_t uwPrescalerValue = 0U;
uint32_t pFLatency;
HAL_StatusTypeDef status = HAL_OK;
/*Configure the TIM2 IRQ priority */
HAL_NVIC_SetPriority(TIM2_IRQn, TickPriority, 0U);
/* Enable the TIM2 global Interrupt */
HAL_NVIC_EnableIRQ(TIM2_IRQn);
/* Enable TIM2 clock */
__HAL_RCC_TIM2_CLK_ENABLE();
@ -101,14 +97,31 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
TimHandle.Init.ClockDivision = 0U;
TimHandle.Init.CounterMode = TIM_COUNTERMODE_UP;
TimHandle.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&TimHandle) == HAL_OK)
status = HAL_TIM_Base_Init(&TimHandle);
if (status == HAL_OK)
{
/* Start the TIM time Base generation in interrupt mode */
return HAL_TIM_Base_Start_IT(&TimHandle);
status = HAL_TIM_Base_Start_IT(&TimHandle);
if (status == HAL_OK)
{
/* Enable the TIM2 global Interrupt */
HAL_NVIC_EnableIRQ(TIM2_IRQn);
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
{
/*Configure the TIM2 IRQ priority */
HAL_NVIC_SetPriority(TIM2_IRQn, TickPriority ,0);
uwTickPrio = TickPriority;
}
else
{
status = HAL_ERROR;
}
}
}
/* Return function status */
return HAL_ERROR;
return status;
}
/**

616
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.c
View File

File diff suppressed because it is too large Load Diff

1
License.md
View File

@ -18,4 +18,3 @@
| STM32 Projects | ST SLA0044 (BSD-3-Clause for basic Examples) | STMicroelectronics |
| STM32 Utilities | BSD-3-Clause | STMicroelectronics |

2
README.md
View File

@ -1,4 +1,4 @@
# STM32CubeF1 MCU Firmware Package
# STM32CubeF1 MCU Firmware Package
**STM32Cube** is an STMicroelectronics original initiative to ease the developers life by reducing efforts, time and cost.

225
Release_Notes.html
View File

@ -5,7 +5,7 @@
<meta name="generator" content="pandoc" />
<meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
<title>Release Notes for STM32CubeF1 Firmware Package</title>
<style type="text/css">
<style>
code{white-space: pre-wrap;}
span.smallcaps{font-variant: small-caps;}
span.underline{text-decoration: underline;}
@ -65,24 +65,102 @@
<div class="col-sm-12 col-lg-8">
<h1 id="update-history">Update History</h1>
<div class="collapse">
<input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true"><strong>V1.8.0 / 26-June-2019</strong></label>
<input type="checkbox" id="collapse-section1_8_1" aria-hidden="true"> <label for="collapse-section1_8_1" aria-hidden="true"><strong>V1.8.1 / 30-July-2020</strong></label>
<div>
<h1 id="maintenance-release">Maintenance release</h1>
<h2 id="main-changes">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li>Remove support of TrueSTUDIO tool chain</li>
<li>General updates to fix CodeSonar compilation warnings</li>
<li>General updates to fix the user manual .chm files</li>
<li>Add support of HAL callback registration feature</li>
<li><strong>The following changes done on the HAL drivers require an update on the application code based on older HAL versions</strong>
<li><p>Patch release to fix known defects and enhancements implementation</p></li>
<li><p><strong>HAL</strong></p>
<ul>
<li><strong>HAL</strong> driver
<ul>
<li>Enhance HAL_SetTickFreq() API robustness
<ul>
<li>Restore previous tick frequency when a wrong tick initialization occurs.</li>
</ul></li>
</ul></li>
<li><strong>HAL/LL I2C</strong> update
<ul>
<li>Update HAL_I2C_ER_IRQHandler() API to fix acknowledge failure issue with I2C memory IT processes
<ul>
<li>Add stop condition generation when NACK occurs.</li>
</ul></li>
<li>Update I2C_DMAXferCplt(), I2C_DMAError() and I2C_DMAAbort() APIs to fix hardfault issue when hdmatx and hdmarx parameters in i2c handle aren’t initialized (NULL pointer).
<ul>
<li>Add additional check on hi2c-&gt;hdmtx and hi2c-&gt;hdmarx before resetting DMA Tx/Rx complete callbacks</li>
</ul></li>
<li>Update HAL_I2C_ER_IRQHandler() API to fix acknowledge failure issue with I2C memory IT processes
<ul>
<li>Add stop condition generation when NACK occursHAL SMBUS</li>
</ul></li>
<li>Update HAL_I2C_Init() API to force software reset before setting new I2C configuration.</li>
<li>Update HAL I2C processes to report ErrorCode when wrong I2C start condition occurs
<ul>
<li>Add new ErrorCode define: HAL_I2C_WRONG_START</li>
<li>Set ErrorCode parameter in I2C handle to HAL_I2C_WRONG_START</li>
</ul></li>
<li>Update sequential APIs to avoid requesting a START when a STOP condition is not fully treated
<ul>
<li>Wait the end of STOP treatment by polling (with a timeout) the STOP bit on Control register CR1</li>
</ul></li>
<li>Update I2C_MasterReceiveRXNE() static API to avoid set the STOP bit again after the bit clearing by Hardware during the masking operation
<ul>
<li>Add new API I2C_WaitOnSTOPRequestThroughIT() to wait for stop bit.</li>
</ul></li>
</ul></li>
<li><strong>HAL/LL USB</strong> update
<ul>
<li>Bug fix: USB_ReadPMA() and USB_WritePMA() by ensuring 16-bits access to USB PMA memory</li>
<li>Bug fix: correct USB RX count calculation</li>
<li>Fix USB Bulk transfer double buffer mode</li>
<li>Remove register keyword from USB defined macros as no more supported by C++ compiler</li>
<li>Minor rework on USBD_Start() and USBD_Stop() APIs: stopping device will be handled by HAL_PCD_DeInit() API.</li>
<li>Remove non used API for USB device mode.</li>
</ul></li>
</ul></li>
</ul>
<h2 id="contents">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
<tr class="header">
<th style="text-align: left;">Name</th>
<th style="text-align: center;">Version</th>
<th style="text-align: center;">Licence</th>
<th style="text-align: center;">Release note</th>
</tr>
</thead>
<tbody>
<tr class="odd">
<td style="text-align: left;"><strong>STM32F1xx HAL</strong></td>
<td style="text-align: center;"><strong>V1.1.5</strong></td>
<td style="text-align: center;"><a href="https://opensource.org/licenses/BSD-3-Clause">BSD-3-Clause</a></td>
<td style="text-align: center;"><a href="Drivers/STM32F1xx_HAL_Driver/Release_Notes.html">release notes</a></td>
</tr>
</tbody>
</table>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true"><strong>V1.8.0 / 26-June-2019</strong></label>
<div>
<h1 id="maintenance-release-1">Maintenance release</h1>
<h2 id="main-changes-1">Main Changes</h2>
<ul>
<li><p>General updates to fix known defects and enhancements implementation</p></li>
<li><p>Remove support of TrueSTUDIO tool chain</p></li>
<li><p>General updates to fix CodeSonar compilation warnings</p></li>
<li><p>General updates to fix the user manual .chm files</p></li>
<li><p>Add support of HAL callback registration feature</p></li>
<li><p><strong>The following changes done on the HAL drivers require an update on the application code based on older HAL versions</strong></p>
<ul>
<li>Add support of <strong>HAL callback registration</strong> feature
<ul>
<li>The feature disabled by default is available for the following HAL drivers:
<ul>
<li><strong>ADC, CAN, CEC, DAC, ETH, HCD, UART, USART, IRDA, SMARTCARD,</strong></li>
<li><strong>MMC, NAND, NOR, PCCARD, PCD, RTC, SD, SRAM, I2C, SPI, I2S, TIM and WWDG</strong></li>
<li><strong>MMC, NAND, NOR, PCCARD, PCD, RTC, SD, SRAM, SPI, I2S, TIM and WWDG</strong></li>
</ul></li>
<li>The feature may be enabled individually per HAL PPP driver by setting the corresponding definition USE_HAL_PPP_REGISTER_CALLBACKS to 1U in stm32f1xx_hal_conf.h project configuration file (template file stm32f1xx_hal_conf_template.h available from Drivers/STM32F1xx_HAL_Driver/Inc)</li>
<li>Once enabled , the user application may resort to HAL_PPP_RegisterCallback() to register specific callback function(s) and unregister it(them) with HAL_PPP_UnRegisterCallback()</li>
@ -94,19 +172,12 @@
</ul></li>
</ul></li>
<li><p>Demonstrations binaries are no more delivered within the STM32CubeF1 MCU package. They are available for download, in addition to their required media files if any, in a standalone package accessible through each hardware board official webpage. Please refer to the corresponding demonstration binary readme.txt to get webpage for each board.</p></li>
<li><strong>HAL</strong>
<li><p><strong>HAL</strong></p>
<ul>
<li>Add support of HAL callback registration feature</li>
<li>Add new <strong>HAL EXTI</strong> driver</li>
<li><strong>Here below the new features introduced on HAL drivers</strong>
<ul>
<li>Add support of I2C repeated start feature in DMA Mode With the following new API’s
<ul>
<li>HAL_I2C_Master_Seq_Transmit_DMA()</li>
<li>HAL_I2C_Master_Seq_Receive_DMA()</li>
<li>HAL_I2C_Slave_Seq_Transmit_DMA()</li>
<li>HAL_I2C_Slave_Seq_Receive_DMA()</li>
</ul></li>
<li>Add SPI Abort transfer API’s:
<ul>
<li>HAL_SPI_Abort()</li>
@ -122,14 +193,14 @@
</ul></li>
</ul></li>
</ul></li>
<li><strong>CMSIS</strong>
<li><p><strong>CMSIS</strong></p>
<ul>
<li>Fix known defects and several implementation enhancement</li>
<li>Fix wrong initialization value for “SystemCoreClock” in System_stm32f1xx.c file</li>
<li>Update gcc linker file template to be aligned with AC6 linker file template</li>
<li>Align ErrorStatus typedef to common error handling</li>
</ul></li>
<li><strong>Middleware</strong>
<li><p><strong>Middleware</strong></p>
<ul>
<li>Update to use FreeRTOS <strong>10.0.1</strong> ST modified <strong>20190329</strong></li>
<li>Update to use STemWin <strong>V5.44</strong> ST modified <strong>20180322</strong></li>
@ -137,9 +208,8 @@
<li>Update to use USB Host Library <strong>V3.3.3</strong></li>
<li>Update to use new version of LwIP <strong>V2.0.3</strong></li>
</ul></li>
<li><strong>Projects</strong>
<li><p><strong>Projects</strong></p>
<ul>
<li>Update HAL I2C examples to be compliant with new I2C API</li>
<li>Update STemWin applications to be compliant with new STemWin architecture</li>
<li>Update USB HOST projects to be compliant with USB Host Stack <strong>V3.3.3:</strong>
<ul>
@ -168,7 +238,7 @@
</ul></li>
<li><p>For the complete list of changes, please refer to the release notes of each firmware component</p></li>
</ul>
<h2 id="contents">Contents</h2>
<h2 id="contents-1">Contents</h2>
<ul>
<li>The STM32CubeF1 Firmware package comes with a rich set of examples running on STMicroelectronics boards, organized by board and provided with pre-configured projects for the main supported toolchains. The exhaustive list of projects is provided in this table <a href="Projects/STM32CubeProjectsList.html">STM32CubeProjectsList.html</a>.</li>
<li>Projects release notes
@ -417,6 +487,7 @@
<h2 id="known-limitations">Known Limitations</h2>
<ul>
<li>SW4STM32 projects aren’t provided for STM32VL-Discovery board because it embeds STLinv1 version that is not hardware supported by SW4STM32 toolchain.</li>
<li>Register callback feature will be deployed on HAL I2C driver in next release</li>
</ul>
<h2 id="development-toolchains-and-compilers">Development Toolchains and Compilers</h2>
<ul>
@ -445,8 +516,8 @@
<div class="collapse">
<input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true"><strong>V1.7.0 / 09-October-2018</strong></label>
<div>
<h1 id="maintenance-release-1">Maintenance release</h1>
<h2 id="main-changes-1">Main Changes</h2>
<h1 id="maintenance-release-2">Maintenance release</h1>
<h2 id="main-changes-2">Main Changes</h2>
<ul>
<li>General update to fix known defects and several implementations enhancement</li>
<li><strong>The following changes done on the HAL drivers require an update on the application code based on older HAL versions</strong>
@ -474,7 +545,7 @@
</ul></li>
<li>For the complete list of changes, please refer to the release notes of each firmware component</li>
</ul>
<h2 id="contents-1">Contents</h2>
<h2 id="contents-2">Contents</h2>
<ul>
<li>The STM32CubeF1 Firmware package comes with a rich set of examples running on STMicroelectronics boards, organized by board and provided with pre-configured projects for the main supported toolchains. The exhaustive list of projects is provided in this table <a href="Projects/STM32CubeProjectsList.html">STM32CubeProjectsList.html</a>.</li>
<li>Projects release notes
@ -752,12 +823,12 @@
<div class="collapse">
<input type="checkbox" id="collapse-section68" aria-hidden="true"> <label for="collapse-section68" aria-hidden="true"><strong>V1.6.1 / 09-March-2018</strong></label>
<div>
<h1 id="maintenance-release-2">Maintenance release</h1>
<h2 id="main-changes-2">Main Changes</h2>
<h1 id="maintenance-release-3">Maintenance release</h1>
<h2 id="main-changes-3">Main Changes</h2>
<ul>
<li><strong>Patch release to fix issues in GPIO, RCC, SMARTCARD, I2C and Generic HAL/LL drivers</strong></li>
</ul>
<h2 id="contents-2">Contents</h2>
<h2 id="contents-3">Contents</h2>
<table>
<thead>
<tr class="header">
@ -779,23 +850,23 @@
<div class="collapse">
<input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true"><strong>V1.6.0 / 12-May-2017</strong></label>
<div>
<h1 id="maintenance-release-3">Maintenance release</h1>
<h2 id="main-changes-3">Main Changes</h2>
<h1 id="maintenance-release-4">Maintenance release</h1>
<h2 id="main-changes-4">Main Changes</h2>
<ul>
<li><p>General update to fix known defects and several implementations enhancement</p></li>
<li><strong>HAL</strong>
<li><p><strong>HAL</strong></p>
<ul>
<li>stm32f1xx_hal_conf_template.h fix typo: update to refer to stm32f1xx_hal_mmc.h instead of stm32f4xx_hal_mmc.h</li>
<li>stm32f1xx_hal_mmc.c add missing () to fix compilation warning detected with SW4STM32 when extra feature is enabled.</li>
<li>stm32f1xx_ll_system.h: fix typo in LL_DBGMCU_APB1_GRP1_I2C1_STOP and LL_DBGMCU_APB1_GRP1_I2C2_STOP literals definition</li>
</ul></li>
<li><strong>Projects</strong>
<li><p><strong>Projects</strong></p>
<ul>
<li>General updates to be compliant with Linux platforms</li>
</ul></li>
<li><p>For the complete list of changes, please refer to the release notes of each firmware component</p></li>
</ul>
<h2 id="contents-3">Contents</h2>
<h2 id="contents-4">Contents</h2>
<ul>
<li>The STM32CubeF1 Firmware package comes with a rich set of examples running on STMicroelectronics boards, organized by board and provided with pre-configured projects for the main supported toolchains. The exhaustive list of projects is provided in this table <a href="Projects/STM32CubeProjectsList.html">STM32CubeProjectsList.html</a>.</li>
<li>Projects release notes
@ -1073,10 +1144,10 @@
<div class="collapse">
<input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true"><strong>V1.5.0 / 14-April-2017</strong></label>
<div>
<h1 id="maintenance-release-4">Maintenance release</h1>
<h2 id="main-changes-4">Main Changes</h2>
<h1 id="maintenance-release-5">Maintenance release</h1>
<h2 id="main-changes-5">Main Changes</h2>
<ul>
<li>Add Low Layer drivers under Drivers32F1xx_HAL_Driver
<li><p>Add Low Layer drivers under Drivers32F1xx_HAL_Driver</p>
<ul>
<li>Low Layer drivers allow performance and memory footprint optimization</li>
<li>Low Layer drivers APIs provide register level programming: they require deep knowledge of peripherals described in STM32F1xx Reference Manuals</li>
@ -1085,7 +1156,7 @@
<li>Refer to [UM1847] (http://www.st.com/st-web-ui/static/active/en/resource/technical/document/user_manual/DM00151047.pdf) for Low Layer presentation and [UM1850] (http://www.st.com/st-web-ui/static/active/en/resource/technical/document/user_manual/DM00154093.pdf) for API list</li>
</ul></li>
<li><p>General update to fix known defects and several implementations enhancement</p></li>
<li><strong>HAL</strong>
<li><p><strong>HAL</strong></p>
<ul>
<li>Add Low Layer drivers under Drivers32F1xx_HAL_Driver</li>
<li>Add new <strong>MMC</strong> HAL driver</li>
@ -1136,12 +1207,12 @@
</ul></li>
</ul></li>
</ul></li>
<li><strong>CMSIS</strong>
<li><p><strong>CMSIS</strong></p>
<ul>
<li>Fix known defects and several implementation enhancement</li>
<li>General update to support Low layer drivers (LL)</li>
</ul></li>
<li><strong>Middleware</strong>
<li><p><strong>Middleware</strong></p>
<ul>
<li>Update STemWin Library V5.32 with a new build with EWARM V7.80</li>
<li>Upgrade to use new version of LwIP V2.0.0
@ -1151,7 +1222,7 @@
<li>Update to new version of FreeRTOS V9.0.0</li>
<li>Update FatFS to implement changes on sd_diskio.c file to be aligned with HAL SD driver and BSP drivers API changes.</li>
</ul></li>
<li><strong>Projects</strong>
<li><p><strong>Projects</strong></p>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li>Add Low Layer examples and MIX examples on the STM32F103RB-Nucleo, STM32F10E-EVAL boards</li>
@ -1161,7 +1232,7 @@
</ul></li>
<li><p>For the complete list of changes, please refer to the release notes of each firmware component</p></li>
</ul>
<h2 id="contents-4">Contents</h2>
<h2 id="contents-5">Contents</h2>
<ul>
<li>The STM32CubeF1 Firmware package comes with a rich set of examples running on STMicroelectronics boards, organized by board and provided with pre-configured projects for the main supported toolchains. The exhaustive list of projects is provided in this table <a href="Projects/STM32CubeProjectsList.html">STM32CubeProjectsList.html</a>.</li>
<li>Projects release notes
@ -1439,11 +1510,11 @@
<div class="collapse">
<input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"><strong>V1.4.0 / 29-April-2016</strong></label>
<div>
<h1 id="maintenance-release-5">Maintenance release</h1>
<h2 id="main-changes-5">Main Changes</h2>
<h1 id="maintenance-release-6">Maintenance release</h1>
<h2 id="main-changes-6">Main Changes</h2>
<ul>
<li><p><strong>Maintenance release to fix known defects and several enhancements implementation.</strong></p></li>
<li><strong>HAL</strong>
<li><p><strong>HAL</strong></p>
<ul>
<li><strong>HAL RCC</strong>
<ul>
@ -1475,13 +1546,13 @@
<li>Adapt FSMC_NAND_Init behavior to the others STM32 series by reseting the bit FSMC_PCRx_PBKEN.</li>
</ul></li>
</ul></li>
<li><strong>CMSIS</strong>
<li><p><strong>CMSIS</strong></p>
<ul>
<li>Add _Pos and _Msk defines to be used with _VAL2FLD(field, value) and _FLD2VAL(field, value).</li>
<li>The previous naming are kept for backward compatibility.</li>
<li>Add APBPrescTable constant to list APB prescalers values.</li>
</ul></li>
<li><strong>BSP</strong>
<li><p><strong>BSP</strong></p>
<ul>
<li>STM32F1xx_Nucleo
<ul>
@ -1496,17 +1567,17 @@
<li>Set the NVIC priority to the lowest possible to not interfere with user settings.</li>
</ul></li>
</ul></li>
<li><strong>Middlewares</strong>
<li><p><strong>Middlewares</strong></p>
<ul>
<li>Update to FreeRTOS V8.2.3.</li>
<li>Update to STM32 USB Device Library V2.4.2</li>
</ul></li>
<li><strong>Others</strong>
<li><p><strong>Others</strong></p>
<ul>
<li>Add latest version of STM32CubeUpdater (V4.10.0).</li>
</ul></li>
</ul>
<h2 id="contents-5">Contents</h2>
<h2 id="contents-6">Contents</h2>
<ul>
<li>The STM32CubeF1 Firmware package comes with a rich set of examples running on STMicroelectronics boards, organized by board and provided with pre-configured projects for the main supported toolchains. The exhaustive list of projects is provided in this table <a href="Projects/STM32CubeProjectsList.html">STM32CubeProjectsList.html</a>.</li>
<li>Projects release notes
@ -1783,15 +1854,15 @@
<div class="collapse">
<input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"><strong>V1.3.1 / 11-January-2016</strong></label>
<div>
<h1 id="maintenance-release-6">Maintenance release</h1>
<h2 id="main-changes-6">Main Changes</h2>
<h1 id="maintenance-release-7">Maintenance release</h1>
<h2 id="main-changes-7">Main Changes</h2>
<ul>
<li><strong>Patch release to fix issue in HAL driver:</strong>
<ul>
<li>Remove the #if defined(USE_HAL_LEGACY) condition to include Legacy/stm32_hal_legacy.h by default, in stm32f1xx_hal_def.h.</li>
</ul></li>
</ul>
<h2 id="contents-6">Contents</h2>
<h2 id="contents-7">Contents</h2>
<table>
<thead>
<tr class="header">
@ -1842,11 +1913,11 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.3.0 / 18-December-2015</strong></label>
<div>
<h1 id="maintenance-release-7">Maintenance release</h1>
<h2 id="main-changes-7">Main Changes</h2>
<h1 id="maintenance-release-8">Maintenance release</h1>
<h2 id="main-changes-8">Main Changes</h2>
<ul>
<li><p><strong>Maintenance release to fix known defects and several enhancements implementation.</strong></p></li>
<li><strong>HAL</strong>
<li><p><strong>HAL</strong></p>
<ul>
<li>Insure that do {} while(0) are used in in multi statement macros. (hal eth and pcd)</li>
<li>Manage simultaneous errors in IRQHandler. (hal uart, smartcard, usart and uart)</li>
@ -1858,25 +1929,25 @@
<li>Reduce the default timeout value for the startup of the HSE form 5s to 100ms.</li>
<li>Update HAL weak empty callbacks to prevent unused argument compilation warnings with some compilers.</li>
</ul></li>
<li><strong>CMSIS</strong>
<li><p><strong>CMSIS</strong></p>
<ul>
<li>Align bit name across all STM32 families (EXTI, WWDG) and keeping backward compatibility with aliases.</li>
</ul></li>
<li><strong>Middlewares</strong>
<li><p><strong>Middlewares</strong></p>
<ul>
<li>Update to CMSIS V4.5.</li>
</ul></li>
<li><strong>Projects</strong>
<li><p><strong>Projects</strong></p>
<ul>
<li>Update all Keil project from Keil V4 to Keil V5.</li>
<li>Update all SW4STM32 projects to version 1.5.0.</li>
</ul></li>
<li><strong>Others</strong>
<li><p><strong>Others</strong></p>
<ul>
<li>Add latest version of STM32CubeUpdater (V4.10.0).</li>
</ul></li>
</ul>
<h2 id="contents-7">Contents</h2>
<h2 id="contents-8">Contents</h2>
<ul>
<li>The STM32CubeF1 Firmware package comes with a rich set of examples running on STMicroelectronics boards, organized by board and provided with pre-configured projects for the main supported toolchains. The exhaustive list of projects is provided in this table <a href="Projects/STM32CubeProjectsList.html">STM32CubeProjectsList.html</a>.</li>
<li>Projects release notes
@ -2154,12 +2225,12 @@
<div class="collapse">
<input type="checkbox" id="collapse-section0" aria-hidden="true"> <label for="collapse-section0" aria-hidden="true"><strong>V1.2.0 / 31-July-2015</strong></label>
<div>
<h1 id="maintenance-release-8">Maintenance release</h1>
<h2 id="main-changes-8">Main Changes</h2>
<h1 id="maintenance-release-9">Maintenance release</h1>
<h2 id="main-changes-9">Main Changes</h2>
<ul>
<li><strong>Maintenance release.</strong></li>
<li><p><strong>Maintenance release.</strong></p></li>
<li><p><strong>Fix known defects and several enhancements implementation.</strong></p></li>
<li><strong>Projects</strong>
<li><p><strong>Projects</strong></p>
<ul>
<li>Adding new projects to introduce the FreeRTOS V8.2.1
<ul>
@ -2169,7 +2240,7 @@
</ul></li>
<li>Adding new application IAP for STM3210E_EVAL board.</li>
</ul></li>
<li><strong>FatFs</strong>
<li><p><strong>FatFs</strong></p>
<ul>
<li>Upgrade to use FatFs R0.11.</li>
<li>Add new APIs FATFS_LinkDriverEx() and FATFS_UnLinkDriverEx() to manage USB Key Disk having multi-lun capability. These APIs are equivalent to FATFS_LinkDriver() and FATFS_UnLinkDriver() with “lun” parameter set to 0.</li>
@ -2179,7 +2250,7 @@
<li>For application code based on previous FatFs version; when moving to R0.11 the changes that need to be done is to update ffconf.h file, taking ffconf_template.h file as reference.</li>
</ul></li>
</ul></li>
<li><strong>CMSIS</strong>
<li><p><strong>CMSIS</strong></p>
<ul>
<li>CMSIS-Core V4.10
<ul>
@ -2201,7 +2272,7 @@
<li>CMSIS-RTOS V1.02 (unchanged)</li>
</ul></li>
</ul>
<h2 id="contents-8">Contents</h2>
<h2 id="contents-9">Contents</h2>
<ul>
<li>The STM32CubeF1 Firmware package comes with a rich set of examples running on STMicroelectronics boards, organized by board and provided with pre-configured projects for the main supported toolchains. The exhaustive list of projects is provided in this table <a href="Projects/STM32CubeProjectsList.html">STM32CubeProjectsList.html</a>.</li>
<li>Projects release notes
@ -2475,20 +2546,20 @@
<div class="collapse">
<input type="checkbox" id="collapse-section000" aria-hidden="true"> <label for="collapse-section000" aria-hidden="true"><strong>V1.1.0 / 05-June-2015</strong></label>
<div>
<h1 id="maintenance-release-9">Maintenance release</h1>
<h2 id="main-changes-9">Main Changes</h2>
<h1 id="maintenance-release-10">Maintenance release</h1>
<h2 id="main-changes-10">Main Changes</h2>
<ul>
<li><p><strong>Add support of System Workbench for STM32 (SW4STM32) toolchain</strong></p></li>
<li><strong>HAL</strong></li>
<li><p><strong>HAL</strong></p></li>
<li><p>No changes</p></li>
<li><strong>Middlewares</strong></li>
<li><p><strong>Middlewares</strong></p></li>
<li><p>No changes</p></li>
<li><strong>BSP</strong></li>
<li><p><strong>BSP</strong></p></li>
<li><p>No changes</p></li>
<li><strong>Projects</strong></li>
<li><p><strong>Projects</strong></p></li>
<li><p>Add projects for SW4STM32 toolchain</p></li>
</ul>
<h2 id="contents-9">Contents</h2>
<h2 id="contents-10">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>
@ -2728,12 +2799,12 @@
<div class="collapse">
<input type="checkbox" id="collapse-section0000" aria-hidden="true"> <label for="collapse-section0000" aria-hidden="true"><strong>V1.0.0 / 17-December-2014</strong></label>
<div>
<h1 id="maintenance-release-10">Maintenance release</h1>
<h2 id="main-changes-10">Main Changes</h2>
<h1 id="maintenance-release-11">Maintenance release</h1>
<h2 id="main-changes-11">Main Changes</h2>
<ul>
<li><strong>First official release of STM32CubeF1 (STM32Cube for STM32F1 Series)</strong></li>
</ul>
<h2 id="contents-10">Contents</h2>
<h2 id="contents-11">Contents</h2>
<table>
<caption>Drivers</caption>
<thead>

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_htmresc/ReleaseNotes.html
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@ -0,0 +1,9 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
<html><head></head>
<body><font color="blue"><b><u>STM32CubeF1 Firmware Package V1.8.1 / 30-July-2020</u></b></font><br>
<br>
<b><u>Main Changes</u></b><br><ul><li><span style="color: rgb(0, 0, 0); font-family: Verdana,sans-serif; font-size: 13.3333px; font-style: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 1; word-spacing: 0px; display: inline ! important; float: none;">Patch release to fix known defects and enhancements implementation.</span></li><ul><li><span style="color: rgb(0, 0, 0); font-style: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 1; word-spacing: 0px; font-family: Verdana,sans-serif; font-size: 10pt;">Update HAL_I2C_ER_IRQHandler() API to fix acknowledge failure issue with I2C memory IT processes.</span></li><li><span style="color: rgb(0, 0, 0); font-style: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 1; word-spacing: 0px; font-family: Verdana,sans-serif; font-size: 10pt;">Update
I2C_DMAXferCplt(), I2C_DMAError() and I2C_DMAAbort() APIs to fix
hardfault issue when hdmatx and hdmarx parameters in i2c handle aren't
initialized (NULL pointer).</span></li><li><span style="color: rgb(0, 0, 0); font-style: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 1; word-spacing: 0px; font-family: Verdana,sans-serif; font-size: 10pt;">Update HAL_I2C_ER_IRQHandler() API to fix acknowledge failure issue with I2C memory IT processes.</span></li><li><span style="color: rgb(0, 0, 0); font-style: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 1; word-spacing: 0px; font-family: Verdana,sans-serif; font-size: 10pt;">Update HAL_I2C_Init() API to force software reset before setting new I2C configuration.</span></li><li><span style="color: rgb(0, 0, 0); font-style: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 1; word-spacing: 0px; font-family: Verdana,sans-serif; font-size: 10pt;">Update HAL I2C processes to report ErrorCode when wrong I2C start condition occurs.</span></li><li><span style="color: rgb(0, 0, 0); font-family: Verdana,sans-serif; font-size: 13.3333px; font-style: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 1; word-spacing: 0px; display: inline ! important; float: none;">Minor rework on USBD_Start() and USBD_Stop() APIs: stopping device will be handled by HAL_PCD_DeInit() API.</span></li></ul></ul><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 67.65pt; text-indent: -18pt; line-height: normal;"><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,&quot;serif&quot;; color: black;"><o:p></o:p></span></p>
</body></html>

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@ -1,7 +1,7 @@
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