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118 lines
6.1 KiB
Plaintext
118 lines
6.1 KiB
Plaintext
/**
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@page RCC_ClockConfig RCC Clock Config example
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@verbatim
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******************** (C) COPYRIGHT 2016 STMicroelectronics *******************
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* @file RCC/RCC_ClockConfig/readme.txt
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* @author MCD Application Team
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* @brief Description of the RCC Clock Config example.
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******************************************************************************
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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@endverbatim
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@par Example Description
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Configuration of the system clock (SYSCLK) and modification of the clock settings in Run mode, using the RCC HAL API.
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In this example, after startup SYSCLK is configured to the max frequency using the PLL with
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HSI48 as clock source, the User push-button (connected to EXTI_Line4_15) will be
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used to change the PLL source:
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- from HSI to HSI48
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- from HSI48 to HSE bypass
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- from HSE bypass to HSI
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@note In HSE bypass mode, input clock will come from the MCO from
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ST_LINK MCU. This frequency cannot be changed, and it is fixed
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at 8 MHz. To use MCO from ST_LINK you need to check the Board
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User Manual to know how to connect the MCO pin to the STM32 device.
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Each time the User push-button is pressed; EXTI_Line4_15 interrupt is generated and in the ISR
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the PLL oscillator source is checked using __HAL_RCC_GET_PLL_OSCSOURCE() macro:
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- If the HSE bypass oscillator is selected as PLL source, the following steps will be followed to switch
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the PLL source to HSI oscillator:
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a- Switch the system clock source to HSE bypass to allow modification of the PLL configuration
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b- Enable HSI Oscillator, select it as PLL source and finally activate the PLL
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c- Select the PLL as system clock source and configure the HCLK and PCLK1 clocks dividers
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d- Disable the HSE bypass oscillator (optional, if the HSE bypass is no more needed by the application)
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- If the HSI oscillator is selected as PLL source, the following steps will be followed to switch
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the PLL source to HSI48 oscillator:
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a- Switch the system clock source to HSI to allow modification of the PLL configuration
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b- Enable HSI48 Oscillator, select it as PLL source and finally activate the PLL
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c- Select the PLL as system clock source and configure the HCLK and PCLK1 clocks dividers
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d- Disable the HSI oscillator (optional, if the HSI is no more needed by the application)
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- If the HSI48 oscillator is selected as PLL source, the following steps will be followed to switch
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the PLL source to HSE bypass oscillator:
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a- Switch the system clock source to HSI48 to allow modification of the PLL configuration
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b- Enable HSE bypass Oscillator, select it as PLL source and finally activate the PLL
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c- Select the PLL as system clock source and configure the HCLK and PCLK1 clocks dividers
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d- Disable the HSI48 oscillator (optional, if the HSI48 is no more needed by the application)
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In this example the SYSCLK is outputted on the MCO1 pin(PA.08).
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=> PA.08 connected to pin 23 on CN10 connector
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LED2 is toggled with a timing defined by the HAL_Delay() API.
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@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
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based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
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a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
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than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
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To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
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@note The application need to ensure that the SysTick time base is always set to 1 millisecond
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to have correct HAL operation.
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@par Directory contents
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- RCC/RCC_ClockConfig/Inc/stm32f0xx_hal_conf.h HAL configuration file
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- RCC/RCC_ClockConfig/Inc/stm32f0xx_it.h Interrupt handlers header file
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- RCC/RCC_ClockConfig/Inc/main.h Header for main.c module
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- RCC/RCC_ClockConfig/Src/stm32f0xx_it.c Interrupt handlers
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- RCC/RCC_ClockConfig/Src/main.c Main program
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- RCC/RCC_ClockConfig/Src/system_stm32f0xx.c STM32F0xx system source file
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@par Hardware and Software environment
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- This example runs on STM32F091xC devices.
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- This example has been tested with STM32F091RC-Nucleo RevC
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board and can be easily tailored to any other supported device
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and development board.
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@par How to use it ?
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In order to make the program work, you must do the following :
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- Open your preferred toolchain
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- Rebuild all files and load your image into target memory
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- Run the example
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* <h3><center>© COPYRIGHT STMicroelectronics</center></h3>
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*/
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